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Via Inductance Calculator
Estimate PCB via inductance, parallel via reduction, high-frequency reactance, and edge-induced voltage from via length, diameter, frequency, and current slew.
Input Parameters
Results
For fast edges, L × di/dt can be more important than the small DC resistance.
Equations Used
Via Inductance:
L(nH) ≈ 5.08 × h(in) × [ln(4h/d) + 1]
Parallel Vias:
Leq ≈ Lsingle / number of vias
Reactance:
XL = 2πfL
Edge Voltage:
V = L × di/dt
Frequently Asked Questions (FAQ)
Q1: Why does via inductance matter?
Via inductance can cause voltage spikes, RF discontinuities, decoupling degradation, and switching noise.
Q2: How do parallel vias help?
Multiple vias in parallel reduce equivalent inductance and spread current.
Q3: Is via diameter important?
Yes. Larger diameter generally reduces inductance, but via length and return path also matter.
Q4: Does this include via pad capacitance?
No. This calculator focuses on inductance and reactance, not full via impedance modeling.
Q5: How should decoupling vias be placed?
Use short, wide, multiple vias close to capacitor pads and planes.
Q6: Do RF vias need special treatment?
Yes. RF vias often require via fences, anti-pad control, and EM simulation.
