Infineon Technologies CY8C22213-24LFI

Overview

CY8C22213-24LFI from Cypress Semiconductor is an 8-bit programmable mixed-signal system-on-chip (PSoC) integrating M8C CPU core, 2 KB Flash, 256 bytes SRAM, 4 digital PSoC blocks, and 3 analog PSoC blocks in a 24-pin SOIC package. It operates at up to 24 MHz, supports 3.0–5.25 V supply, -40°C to +85°C industrial temperature range, and delivers rail-to-rail analog functions including 14-bit ADCs and 9-bit DACs for embedded sensor interface and motor control applications.

For engineers reviewing the CY8C22213-24LFI datasheet, CY8C22213-24LFI pinout, CY8C22213-24LFI application, or CY8C22213-24LFI equivalent, key selection criteria include configurable analog/digital blocks, ISSP-enabled in-system programming, GPIO drive strength (25 mA sink / 30 mA analog output), and integrated I²C/SPI/UART peripherals with flexible clocking (24 MHz IMO ±2.5%, optional 32.768 kHz ECO + PLL).

Technical Context

The CY8C22213-24LFI implements a Harvard-architecture M8C CPU core with 10 interrupt vectors, Sleep/WDT timers, and dual-clock domain operation-24/48 MHz IMO for digital system and 32 kHz ILO for low-power timing. Its global interconnect architecture routes signals between 4 digital blocks (configurable as PWMs, timers, UART, SPI) and 3 analog blocks (CT + 2 SC) across two IO ports.

Analog resources include one decimator for Delta-Sigma ADC implementation, programmable gain amplifiers (up to 48×), 16-threshold comparators, and a 1.3 V internal reference. Digital system supports CRC/PRS modules and full-duplex UART connectable to any GPIO via global buses-enabling runtime reconfiguration of peripheral topology without hardware change.

Key Specifications

Pinout & Package

Package: 24-pin SOIC (Small Outline Integrated Circuit), 300 mil width, RoHS-compliant, surface-mount compatible.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable mixed-signal controller applications.

Compared with CY8C22213-24LFI, CY8C21234-24LFXI offers double Flash/SRAM for complex control algorithms but no added peripherals, while CY8C20234-24LQXI trades analog flexibility for dedicated capacitive sensing-making CY8C22213-24LFI optimal for balanced mixed-signal applications requiring both precision analog and robust digital resources.

Availability

CY8C22213-24LFI is available at Aetrix Electronics and suitable for industrial sensor nodes, motor control interfaces, smart lighting controllers, and automotive body control modules requiring stable component supply and long-term lifecycle support.

Supply support for CY8C22213-24LFI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) is a fabless semiconductor company specializing in programmable embedded solutions, USB controllers, memory, and PSoC architecture since 1982.

The CY8C22x13 product line was designed to replace discrete analog/digital components with a single-field-programmable chip for cost-sensitive, medium-complexity embedded control applications in industrial and consumer markets.

FAQ

What development tools are required to program the CY8C22213-24LFI?

PSoC Designer IDE (v5.4 or earlier, Windows XP-compatible) is mandatory for configuration and code generation. Hardware requires a MiniProg1 or MiniProg3 programmer/debugger connected via SWD pins. The toolchain includes C compiler, macro assembler, and graphical device editor for analog/digital block placement - no third-party toolchains are supported due to proprietary configuration file format and ISSP protocol.

Does the CY8C22213-24LFI support true hardware UART with automatic baud rate detection?

No. It implements a software-configured UART using digital PSoC blocks with fixed baud rates derived from internal clocks. Baud rate is set during configuration via PSoC Designer and cannot be dynamically adjusted at runtime. Supported rates include standard values (9600, 19200, 38400, 115200 bps) with ±2% tolerance depending on IMO accuracy and divider settings.

Can the analog output drive a 100 Ω load at full scale without external buffering?

Yes. The 30 mA analog output driver supports continuous 100 Ω loads at full-scale voltage (0–VDD) within specified temperature range. Output compliance is guaranteed down to 0.5 V above VSS at 30 mA, verified per Figure 12-12 in Rev. *E datasheet. For loads below 50 Ω or high-frequency signals, external opamp buffering is recommended.

Is the 24-pin SOIC package of CY8C22213-24LFI pin-compatible with other CY8C22x13 variants?

Yes. All CY8C22x13 devices in 24-pin SOIC (LFI suffix) share identical pinout, including VDD/VSS placement, GPIO mapping, XIN/XOUT location, and SWD interface. Differences are limited to internal resource allocation (e.g., analog block count) and electrical specs - enabling drop-in replacement for firmware-compatible designs with equivalent memory and peripheral needs.