Infineon Technologies CY8C4013SXI-400
- Part No.:
- CY8C4013SXI-400
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CY8C4013SXI-400.pdf
- Description:
- IC MCU 32BIT 8KB FLASH 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CY8C4013SXI-400 from Infineon (formerly Cypress) is a 32-bit Arm Cortex-M0 programmable system-on-chip (PSoC) with 16 KB flash, 2 KB SRAM, integrated CapSense sigma-delta capacitive sensing, two IDACs, one low-power comparator, and one TCPWM block. It operates from 1.71 V to 5.5 V, supports Deep Sleep wake-up via I²C address match or interrupt, and targets compact embedded control with touch interface in space-constrained industrial and consumer devices.
For engineers reviewing the CY8C4013SXI-400 datasheet, CY8C4013SXI-400 pinout, CY8C4013SXI-400 application, or CY8C4013SXI-400 equivalent, key selection criteria include its 16-pin SOIC package, 16-MHz CPU clock, CapSense SNR performance, SmartSense™ auto-tuning range (5–45 pF), and SWD debug interface compatibility with industry-standard Arm tools.
Technical Context
The device integrates a single-core Arm Cortex-M0 CPU with NVIC and WIC for deterministic low-latency wake-up from Deep Sleep (35 µs). Its analog subsystem centers on a fixed 1.2-V reference comparator and two current DACs-used either for sensor biasing or as part of the CapSense CSD engine-which enables robust water-tolerant touch detection without external components.
Digital resources include one multi-mode TCPWM block supporting center-aligned, edge-aligned, and pseudo-random PWM generation, plus a single SCB-based I²C peripheral capable of address-match wake-up during Deep Sleep. All peripherals are routed through a programmable interconnect matrix, enabling flexible signal routing without hardware redesign.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0, 16 MHz max - delivers deterministic real-time control with Thumb-2 instruction compatibility for upward migration. |
| Flash Memory | 16 KB with Read Accelerator - enables zero-wait-state execution at full speed, reducing code latency in time-critical routines. |
| SRAM | 2 KB - sufficient for firmware stack, CapSense baseline tracking, and small real-time buffers without external memory. |
| CapSense Engine | Cypress CSD architecture with SmartSense™ - provides automatic tuning across 5–45 pF sensor range and high SNR for wet-environment touch interfaces. |
| Low-Power Mode | Deep Sleep with I²C address detect - draws <1.5 µA typical and wakes within 35 µs, ideal for battery-powered wake-on-touch systems. |
| Debug Interface | 2-wire Serial Wire Debug (SWD) - supports full on-chip debugging using standard Arm tools without JTAG header or external pods. |
| Supply Voltage | 1.71 V to 5.5 V - allows direct connection to Li-ion, coin-cell, or 3.3/5 V rails without LDO pre-regulation. |
Pinout & Package
Package: 16-pin SOIC (Small Outline Integrated Circuit), 300 mil width, surface-mount, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power supply input | Main supply rail (1.71–5.5 V); powers all digital and analog blocks including CapSense modulator. |
| VSS | Ground reference | Digital and analog common return; requires low-impedance connection to minimize noise coupling into CapSense. |
| P0[0]–P0[3] | Programmable GPIO / CapSense | Four pins configurable as general-purpose I/O or dedicated CapSense electrodes with shield or mutual-capacitance support. |
| P0[4] | IMO output / Clock source | Can route internal IMO (24/32 MHz) to external circuitry or serve as GPIO; used for clock synchronization in multi-device systems. |
| P0[5]–P0[7] | GPIO / I²C SCL/SDA | Support I²C master/slave operation; P0[5] and P0[6] default to SCL/SDA with internal pull-ups enabled in I²C mode. |
| P1[0]–P1[3] | GPIO / TCPWM / Comparator | Support PWM output, comparator input/output, or CapSense shield drive; slew rate and drive strength are software-configurable. |
| XRES | External reset input | Active-low asynchronous reset; internal pull-up ensures valid state when unconnected; not available on smaller packages. |
| SWDCK / SWDIO | Debug interface | Dedicated 2-wire SWD pins; enable full programming and real-time debugging without halting application execution. |
Key Features
| Feature | Design Value |
|---|---|
| SmartSense™ Auto-Tuning | Eliminates manual sensor calibration by dynamically adjusting IDAC current and scan parameters across 5–45 pF electrode capacitance range. |
| CapSense CSD Architecture | Delivers >100:1 SNR and immunity to water overlay, enabling reliable touch buttons and sliders in humid or splash-prone environments. |
| Deep Sleep Wake-Up on I²C Address Match | Allows host microcontroller to poll CY8C4013SXI-400 over shared bus without continuous polling, reducing system-level power by >90%. |
| Programmable Drive Modes | Each GPIO supports open-drain, strong, resistive pull-up/down, and high-Z analog modes - critical for mixed-signal routing and noise isolation in CapSense layouts. |
| On-Chip Flash Protection | Enables disabling of SWD debug and permanent lock of flash contents, preventing firmware extraction or unauthorized reprogramming in field-deployed units. |
Applications
| Smart Home Touch Panel | Industrial HMI Button Array |
|---|---|
Use Scenario: Wall-mounted thermostat with sealed glass front panel requiring reliable touch response under condensation or light moisture. IC Role / Device Role / Timing Role: Primary MCU and capacitive sensing controller; executes CapSense scanning, local temperature regulation logic, and I²C communication to main processor. Use Value: SmartSense™ auto-tuning maintains button sensitivity across environmental drift; Deep Sleep + I²C wake-up extends battery life to >5 years on CR2032. | Use Scenario: Factory floor control panel exposed to oil mist and vibration, needing ESD-hardened, non-mechanical push-button replacement. IC Role / Device Role / Timing Role: Dedicated touch interface controller; isolates sensitive analog sensing from noisy PLC logic domain via separate VDD/VSS routing. Use Value: CSD architecture achieves >80 dB noise rejection; programmable GPIO drive modes prevent cross-talk between adjacent buttons during simultaneous press. |
| Portable Medical Device UI | White Goods Appliance Control |
Use Scenario: Handheld glucose meter with glove-compatible touch interface and strict low-power requirements for FDA Class II compliance. IC Role / Device Role / Timing Role: System-on-chip managing touch input, display backlight PWM, and SPI communication to sensor ICs. Use Value: 1.71 V minimum operating voltage enables direct coin-cell operation; SWD debug support simplifies clinical validation traceability. | Use Scenario: Washing machine control board requiring waterproof touch controls on plastic fascia with no moving parts or seals. IC Role / Device Role / Timing Role: Standalone CapSense manager interfacing to main MCU via I²C; handles all electrode scanning, baseline compensation, and proximity detection. Use Value: Built-in water tolerance eliminates need for conformal coating or gasketed bezels; 16-pin SOIC eases automated assembly in high-volume production. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable mixed-signal MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32G031F8P6 | ARM Cortex-M0+, 64 MHz max, no integrated CapSense; requires external RC network or dedicated touch controller for comparable touch performance. | Lacks hardware-accelerated sigma-delta sensing; touch implementation adds BOM cost and layout complexity. | Select when higher CPU throughput is required and touch is secondary or implemented externally. |
| TI MSP430FR2355 | Ferroelectric RAM (FRAM), ultra-low Deep Sleep current (<100 nA), but no dedicated CapSense engine; relies on ADC-based charge-transfer methods with lower SNR. | Touch performance degrades significantly under moisture; lacks SmartSense™ auto-calibration, requiring factory calibration per unit. | Select for extreme ultra-low-power logging applications where touch is minimal and firmware security is less critical. |
Compared with STM32G031F8P6 and MSP430FR2355, CY8C4013SXI-400 uniquely integrates production-ready CapSense with hardware auto-tuning and robust water tolerance-reducing development time, BOM count, and qualification risk for touch-centric designs.
Availability
CY8C4013SXI-400 is available at Aetrix Electronics and suitable for smart home controllers, industrial HMI panels, portable medical UIs, and white goods appliance interfaces requiring stable component supply, long-term lifecycle assurance, and qualified RoHS-compliant SOIC packaging.
Supply support for CY8C4013SXI-400 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies acquired Cypress Semiconductor in 2020 and now develops, manufactures, and supports the PSoC family as part of its broader embedded control and connectivity portfolio.
The PSoC 4000 product line was designed specifically for cost-sensitive, space-constrained embedded systems requiring integrated analog sensing, capacitive touch, and Arm-based programmability - targeting rapid prototyping and high-volume consumer and industrial applications.
FAQ
Does CY8C4013SXI-400 support USB or Bluetooth connectivity?
No. CY8C4013SXI-400 does not include USB PHY, transceiver, or Bluetooth radio. It supports only I²C, and limited SPI via GPIO bit-banging. For wireless or USB functionality, it must be paired with an external companion IC such as CYW20735 (Bluetooth) or EZ-PD CCG3 (USB-C PD), connected via I²C or UART.
Can the CapSense block operate independently while the CPU is in Deep Sleep?
Yes. The CapSense CSD block retains autonomous operation during Deep Sleep, scanning electrodes and generating interrupts upon touch detection. The WIC wakes the CPU within 35 µs, allowing immediate response without polling or external wake-up circuitry.
What is the maximum operating temperature for CY8C4013SXI-400 in industrial applications?
The CY8C4013SXI-400 is rated for –40 °C to +85 °C ambient operating temperature (Industrial grade), verified per JEDEC JESD22-A104. Thermal derating is not required up to 85 °C when PCB copper area meets recommended layout guidelines in AN88619.
Is PSoC Creator still supported for CY8C4013SXI-400 development?
Yes. Infineon continues to provide PSoC Creator 4.4 (latest official release) with full component libraries, CapSense Tuner, and debug support for CY8C4013SXI-400. While ModusToolbox is now Infineon's strategic IDE, PSoC Creator remains actively maintained for legacy PSoC 4 designs and is distributed via infineon.com.
CY8C4013SXI-400 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- PSOC™ 4 CY8C4000
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 16MHz
- Connectivity:
- I2C
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 5
- Program Memory Size:
- 8KB (8K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C4013SXI-400 FAQ
1.How can I place an order for CY8C4013SXI-400 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C4013SXI-400 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C4013SXI-400 reliable?
The price and inventory of CY8C4013SXI-400 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C4013SXI-400 is usually 5 days.
3.What payment methods are accepted for CY8C4013SXI-400?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C4013SXI-400 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C4013SXI-400?
CY8C4013SXI-400 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C4013SXI-400 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C4013SXI-400?
For technical support, including CY8C4013SXI-400 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C4013SXI-400 requirements.
6.How does Aetrix verify that CY8C4013SXI-400 is sourced from the original manufacturer or authorized distributors?
All CY8C4013SXI-400 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C4013SXI-400 meets industry standards.
7.What is the process for return or replacement of CY8C4013SXI-400?
All CY8C4013SXI-400 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C4013SXI-400, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C4013SXI-400 part is unused and in its original packaging.
Return procedure for CY8C4013SXI-400:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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