Infineon Technologies CY8C4125AZI-483
- Part No.:
- CY8C4125AZI-483
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
CY8C4125AZI-483.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 48TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,500
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CY8C4125AZI-483 from Infineon Technologies (formerly Cypress Semiconductor) is a 32-bit Arm® Cortex™-M0 programmable system-on-chip (PSoC® 4100 family) integrating MCU, reconfigurable analog/digital blocks, 12-bit SAR ADC, two opamps, and dual SCB peripherals. It operates from 1.71 V to 5.5 V, supports Deep Sleep mode at 20 nA, and delivers 24 MHz CPU performance with up to 32 kB flash and 4 kB SRAM. Used in capacitive touch interfaces, motor control signal conditioning, and low-power industrial sensor nodes.
For engineers reviewing the CY8C4125AZI-483 datasheet, CY8C4125AZI-483 pinout, CY8C4125AZI-483 application, or CY8C4125AZI-483 equivalent, key selection criteria include its integrated CapSense Sigma-Delta (CSD) engine, programmable TCPWM kill-input triggering for motor safety, SWD debug interface, and 48-pin TQFP package with full GPIO reconfigurability across analog/digital/LCD/CapSense functions.
Technical Context
The device implements a single-layer AHB-Lite interconnect between Cortex-M0 CPU, SRAM, flash with read accelerator, and peripheral subsystems. Analog resources include a CTBm block hosting two opamps (with comparator/ADC buffer modes), a 12-bit SAR ADC with channel sequencer and signal averaging, and two IDACs supporting capacitive sensing on any GPIO.
Digital flexibility is enabled by four 16-bit TCPWM blocks supporting center-aligned PWM, pseudo-random modulation, and comparator-triggered kill signals; two SCBs independently configurable as I²C/SPI/UART; and a programmable digital system interconnect (DSI) routing layer that dynamically connects peripherals to GPIOs without fixed pin assignments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0, 24 MHz max, single-cycle 32-bit multiply - enables deterministic real-time control and Thumb-2 binary compatibility with higher-tier Cortex-M devices. |
| Flash / SRAM | 32 kB flash with Read Accelerator, 4 kB SRAM - supports firmware storage with zero-wait-state execution at full speed and data retention in Hibernate mode. |
| ADC | 12-bit SAR, 806 ksps, differential/single-ended, channel sequencer with signal averaging - enables high-resolution sensor acquisition with noise suppression in embedded measurement systems. |
| Analog Peripherals | 2 opamps (reconfigurable drive modes + comparator/ADC buffer), 2 low-power comparators, 2 IDACs - provides flexible signal conditioning, threshold detection, and capacitive sensing excitation on any pin. |
| Power Modes | Stop Mode @ 20 nA, Deep Sleep @ 1.3 µA, Hibernate with SRAM retention - allows ultra-low-power operation in battery-powered endpoints with fast wake-up via GPIO or comparator events. |
| Package | 48-pin TQFP (AZI suffix), 7 mm × 7 mm, 0.5 mm pitch - provides mechanical robustness, thermal performance, and PCB assembly compatibility for industrial control boards. |
Pinout & Package
48-pin Thin Quad Flat Package (TQFP), body size 7 mm × 7 mm, lead pitch 0.5 mm, exposed pad for thermal dissipation. Pinout validated per Cypress PSoC 4100 Family Datasheet (001-87220 Rev. *K), Table 11–1 "CY8C4125AZI-483 Pin Definitions".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | Port 0 GPIO | Programmable digital/analog/CapSense/LCD pins; support high-drive, open-drain, and slew-rate control - enables direct interface to buttons, LEDs, sensors, and displays without external components. |
| P1[0]–P1[7] | Port 1 GPIO | Same reconfigurability as Port 0; includes dedicated SWDIO/SWCLK for debug - allows in-system programming and real-time debugging using standard Arm tools. |
| P2[0]–P2[7] | Port 2 GPIO | Supports analog input buffering, IDAC output, and comparator inputs - used for precision analog front-end design including sensor biasing and signal conditioning. |
| P3[0]–P3[7] | Port 3 GPIO | Includes dedicated SCB0/SCB1 signal lines (SCL/SDA, MOSI/MISO/SCK, TX/RX) - enables concurrent I²C, SPI, and UART communication on independent hardware blocks. |
| P4[0]–P4[7] | Port 4 GPIO | Supports TCPWM outputs, LCD segment/common drive, and interrupt-capable inputs - used for motor gate drive timing, segmented display control, and wake-up event handling. |
| VDD / VSS | Power / Ground | Single 1.71–5.5 V supply; VSS pins distributed for low-noise analog/digital separation - simplifies power delivery while maintaining ADC accuracy and digital integrity. |
| XRES | Reset Input | Active-low asynchronous reset with internal pull-up - ensures reliable power-on and fault recovery without external RC network. |
| XTAL_IN / XTAL_OUT | Crystal Oscillator | Supports external 4–25 MHz crystal for precise clocking - optional when using internal IMO/ILO, but required for <±50 ppm timing accuracy in communication or metrology applications. |
Key Features
| Feature | Design Value |
|---|---|
| CapSense Sigma-Delta (CSD) | SNR >5:1 with water tolerance and SmartSense™ auto-tuning - eliminates manual calibration effort and maintains touch reliability under moisture or EMI stress. |
| Programmable Analog Blocks | Two opamps configurable as PGA, comparator, or ADC input buffer - reduces BOM count by replacing discrete signal-chain components in sensor interfaces. |
| TCPWM Kill Input | Hardware-level comparator-triggered PWM shutdown within <100 ns - meets functional safety requirements for motor drives and power converters without software latency. |
| SWD Debug Interface | Two-wire Serial Wire Debug with 4 breakpoint and 2 watchpoint comparators - enables full on-chip debugging in production firmware without JTAG header footprint. |
| Flexible GPIO Routing | All 36 GPIOs support CapSense, LCD, analog, or digital functions with programmable drive strength/slew rate - accelerates prototyping and enables late-stage hardware reuse across product variants. |
Applications
| Industrial Touch HMI | Smart Sensor Node |
|---|---|
Use Scenario: Waterproof control panel for HVAC or factory HMIs with slider, button, and proximity detection. IC Role / Device Role / Timing Role: Primary controller executing CapSense CSD algorithm, driving 4-segment LCD, and managing I²C temperature/humidity sensor interface. Use Value: Eliminates mechanical switches and external touch controllers; achieves >5:1 SNR under condensation using hardware-accelerated CSD and SmartSense™ tuning. | Use Scenario: Battery-powered environmental monitor logging temperature, pressure, and gas concentration every 10 minutes. IC Role / Device Role / Timing Role: System-on-chip managing ultra-low-power sleep/wake cycles, SAR ADC sampling, and BLE UART bridge via SCB1. Use Value: Achieves 5-year battery life via 20 nA Stop Mode, wake-on-comparator event, and flash-accelerated firmware execution during active intervals. |
| Motor Control Interface | Programmable Power Sequencer |
Use Scenario: BLDC motor driver board requiring overcurrent protection, commutation timing, and status LED feedback. IC Role / Device Role / Timing Role: Real-time timing controller generating center-aligned PWM, monitoring current sense amplifier output via comparator kill input, and driving status indicators. Use Value: Hardware-enforced <100 ns PWM disable on overcurrent event prevents MOSFET shoot-through without CPU intervention or external logic. | Use Scenario: FPGA or ASIC power management module sequencing 3.3 V, 1.8 V, and 1.2 V rails with voltage monitoring and fault logging. IC Role / Device Role / Timing Role: Programmable sequencer using TCPWM timers, LVD interrupts, and flash-resident fault history log. Use Value: Replaces discrete supervisor ICs and CPLDs; enables field-upgradable sequencing profiles and failure diagnostics via USB-to-UART bridge. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable mixed-signal microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY8C4025LQI-482 | Lower memory (16 kB flash / 2 kB SRAM), no CapSense CSD block, same 48-pin QFN package | Lacks hardware capacitive sensing acceleration; limited to simple GPIO-based touch or non-touch control | Select when cost-sensitive designs omit advanced touch and require only basic MCU + analog peripherals. |
| STM32F072RBT6 | ARM Cortex-M0, 48-pin LQFP, 128 kB flash / 16 kB SRAM, no programmable analog blocks, separate ADC/DAC/comparator | Requires external signal conditioning for precision analog; lacks CapSense, LCD, or TCPWM kill-input capability | Select when large code footprint dominates, and analog functions are implemented externally or not required. |
Compared with CY8C4125AZI-483, CY8C4025LQI-482 trades CapSense and memory for lower unit cost, while STM32F072RBT6 offers greater flash headroom but demands discrete analog circuitry and lacks hardware safety features like comparator-triggered PWM kill.
Availability
CY8C4125AZI-483 is available at Aetrix Electronics and suitable for industrial touch HMIs, smart sensor nodes, motor control interfaces, and programmable power sequencers requiring stable component supply and long-term manufacturability.
Supply support for CY8C4125AZI-483 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies AG, headquartered in Munich, Germany, is a global semiconductor leader delivering power systems, sensors, and microcontrollers for automotive, industrial, and IoT applications.
This device belongs to the PSoC® 4100 family - a mixed-signal programmable SoC platform designed for embedded systems requiring integrated analog signal conditioning, capacitive sensing, low-power operation, and flexible digital logic reconfiguration in a single chip.
FAQ
What debug interface does CY8C4125AZI-483 support?
CY8C4125AZI-483 uses the Arm Serial Wire Debug (SWD) interface with two dedicated pins (SWDIO and SWCLK). It supports full on-chip debugging including breakpoints, watchpoints, memory inspection, and real-time variable monitoring. Debug is enabled by default and can be disabled in firmware; re-enabling requires full flash erase if security is locked.
Does CY8C4125AZI-483 support capacitive touch sensing on all GPIOs?
Yes - all 36 GPIOs support CapSense functionality via the integrated CapSense Sigma-Delta (CSD) block. Each pin can serve as a sensor electrode, shield, or connection to external capacitive elements. Hardware-accelerated CSD provides >5:1 SNR and automatic SmartSense™ tuning without host CPU overhead.
Can CY8C4125AZI-483 operate from a 3.3 V supply while driving 5 V-tolerant GPIOs?
No - CY8C4125AZI-483 has a single VDD supply rail rated 1.71 V to 5.5 V. Its GPIOs are not 5 V-tolerant when VDD = 3.3 V; maximum input voltage is VDD + 0.5 V. To interface with 5 V logic, external level shifters or resistive dividers are required per Cypress AN88619 guidelines.
How is flash protection configured on CY8C4125AZI-483?
Flash protection is implemented in three modes: Open (default, debug enabled), Protected (debug disabled, flash erasable), and Kill (debug and external erase permanently disabled). Protection is set via flash row configuration registers and is irreversible in Kill mode. Row-level read/write protection is also supported for selective memory access control.
CY8C4125AZI-483 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 48-LQFP
- Series:
- PSOC™ 4 CY8C4100
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 24MHz
- Connectivity:
- I2C, IrDA, LINbus, Microwire, SmartCard, SPI, SSP, UART/USART
- Peripherals:
- Brown-out Detect/Reset, CapSense, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 36
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 5.5V
- Data Converters:
- A/D 8x12b SAR; D/A 2xIDAC
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C4125AZI-483 FAQ
1.How can I place an order for CY8C4125AZI-483 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C4125AZI-483 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C4125AZI-483 reliable?
The price and inventory of CY8C4125AZI-483 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C4125AZI-483 is usually 5 days.
3.What payment methods are accepted for CY8C4125AZI-483?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C4125AZI-483 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C4125AZI-483?
CY8C4125AZI-483 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C4125AZI-483 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C4125AZI-483?
For technical support, including CY8C4125AZI-483 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C4125AZI-483 requirements.
6.How does Aetrix verify that CY8C4125AZI-483 is sourced from the original manufacturer or authorized distributors?
All CY8C4125AZI-483 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C4125AZI-483 meets industry standards.
7.What is the process for return or replacement of CY8C4125AZI-483?
All CY8C4125AZI-483 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C4125AZI-483, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C4125AZI-483 part is unused and in its original packaging.
Return procedure for CY8C4125AZI-483:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CY8C4125AZI-483 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
Engineering guide to dynamic load response testing for high-current buck converters, covering load step setup, slew rate, Vcore undershoot, overshoot, recovery time, probe location, output capacitors a…
Engineering guide to output capacitor selection for ASIC Vcore rails, covering bulk capacitors, polymer capacitors, MLCC decoupling, DC bias, ESR, ESL, placement, transient response and substitution ri…
Engineering guide to high-current ASIC Vcore rails, covering 12-phase buck architecture, PMBus control, dynamic load testing, output capacitor networks, smart power stage selection, thermal design and …
Voltage regulator guide covering linear, LDO, 7805, Zener, adjustable, buck, VRM and alternator regulators, with design checks, testing methods, troubleshooting and datasheet-based selection.
Amplifier guide covering voltage, current and power amplification, gain, feedback, amplifier classes, audio and RF applications, op-amp circuits, transimpedance amplifiers, datasheet selection and trou…

