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Infineon Technologies CY8C5568AXI-060
- Part No.:
- CY8C5568AXI-060
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
CY8C5568AXI-060.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 100TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,492
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Product details
Overview
CY8C5568AXI-060 from Infineon Technologies (acquired Cypress Semiconductor) is a 32-bit programmable system-on-chip (PSoC® 5) integrating ARM Cortex-M3 CPU, configurable analog/digital peripherals, 256 KB Flash, 64 KB SRAM, and 2 KB EEPROM. It operates from 2.7 V to 5.5 V, supports up to 67 MHz clocking via internal PLL, and delivers 192 ksps delta-sigma ADC performance with ±1-bit INL/DNL in 12-bit mode - used in precision sensor signal acquisition and real-time control systems.
For engineers reviewing the CY8C5568AXI-060 datasheet, CY8C5568AXI-060 pinout, CY8C5568AXI-060 application, or CY8C5568AXI-060 equivalent, key selection criteria include its 60 GPIOs with full analog/digital routability, USB 2.0 FS capability, 24-channel DMA, CapSense® support, and industrial temperature range (–40 °C to +85 °C).
Technical Context
The CY8C5568AXI-060 implements a hierarchical architecture with ARM Cortex-M3 core, dual-bus AMBA AHB/ASB interconnect, and independent analog/digital subsystems. Its digital domain features 24 UDBs supporting custom logic synthesis, four 16-bit timer/counter/PWM blocks, and Full-Speed USB 2.0 PHY requiring external 24 MHz crystal.
Analog subsystem includes one configurable delta-sigma ADC (8–20-bit, 192 ksps max), two 12-bit SAR ADCs (700 ksps), four opamps (10 mA drive), four comparators (95 ns response), and four SC/CT blocks for PGA/TIA/mixer configurations - all accessible through shared analog routing matrix and any GPIO.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, DC to 67 MHz operation - enables deterministic real-time control with Thumb-2 instruction set and NVIC interrupt handling. |
| Memory | 256 KB Flash (100k write cycles, 20-yr retention), 64 KB SRAM, 2 KB EEPROM - supports firmware updates, data logging, and secure boot without external memory. |
| ADC Performance | Delta-sigma ADC: 12-bit @ 192 ksps, 66 dB SINAD, ±1-bit INL/DNL - suitable for thermocouple, RTD, and bridge sensor interfaces with minimal calibration. |
| Digital Peripherals | 24 UDBs, 4×16-bit Timer/Counter/PWM, USB 2.0 FS, I²C multimaster, SPI, UART - allows hardware-accelerated protocol stacks and mixed-signal timing-critical functions. |
| Analog Resources | 4× opamps (10 mA output), 4× comparators (95 ns), 4× SC/CT blocks, CapSense® on all GPIO - enables front-end signal conditioning, threshold detection, and touch interface integration. |
| Power Management | 2 µA sleep mode, 300 nA hibernate with RAM retention, 6 mA @ 6 MHz - meets battery-powered IoT node and portable medical device requirements. |
| I/O System | 60 GPIOs + 8 SIOs + 2 USBIOs, 1.2–5.5 V I/O voltage domains, Schmitt-trigger inputs, configurable drive modes - supports mixed-voltage interfacing and direct LCD segment driving (46×16). |
Pinout & Package
Package: 68-pin QFN (10 mm × 10 mm, 0.5 mm pitch), RoHS-compliant, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDA/VDDD | Analog/Digital Power Supply | Separate 2.7–5.5 V supplies enable noise isolation between analog and digital domains; VDDA must be ≥ VDDD for ADC reference stability. |
| P0[0]–P0[7] | General Purpose I/O Bank 0 | Supports CapSense®, analog mux input, opamp output, or digital routing - all pins configurable as strong/Schmitt/open-drain with programmable pull-up/down. |
| XTAL_IN/XTAL_OUT | 4–25 MHz Crystal Oscillator Interface | Drives external crystal for precise clock source; required for USB timing compliance and RTC accuracy when 32.768 kHz watch crystal is also used. |
| USB_DP/USB_DM | Full-Speed USB 2.0 Differential Pair | Integrated PHY with internal termination; requires external 24 MHz crystal and ESD protection diodes per USB specification. |
| SWDIO/SWCLK | Single-Wire Debug Interface | Enables programming, breakpoint insertion, and real-time trace via SWD/SWV - no JTAG header needed; supports field firmware updates. |
Key Features
| Feature | Design Value |
|---|---|
| Configurable Analog Subsystem | Four SC/CT blocks support PGA, TIA, mixer, or sample-and-hold - eliminates discrete opamp/filter components for sensor front-ends. |
| Digital Filter Block (DFB) | 24-bit fixed-point FIR/IIR engine with 64-tap capability and 48-bit MAC/cycle - performs real-time digital filtering of ADC data without CPU load. |
| CapSense® on All GPIO | Self- and mutual-capacitance sensing with <1% noise immunity - enables robust touch buttons, sliders, and proximity detection using standard PCB traces. |
| Programmable Clock Tree | Internal IMO (3–48 MHz), PLL (up to 67 MHz), 32.768 kHz WCO, and ILO (1/33/100 kHz) - provides flexible low-power wake-up sources and jitter-free peripheral clocks. |
| Secure Flash Protection | Read/write protection, flash patch and breakpoint (FPB), and bootloader authentication - prevents unauthorized firmware extraction or overwrite in production devices. |
Applications
| Industrial Sensor Node | Medical Patient Monitor |
|---|---|
|
Use Scenario: Remote environmental monitoring with multi-sensor fusion (thermistor, humidity, CO₂). IC Role / Device Role / Timing Role: Central signal acquisition and preprocessing unit - digitizes analog sensors, runs DFB-based filtering, and transmits via USB or I²C. Use Value: Single-chip integration reduces BOM count by >12 components; 192 ksps delta-sigma ADC resolves microvolt-level thermocouple signals with <0.5 mV offset. |
Use Scenario: Portable ECG/SpO₂ monitor with capacitive touch UI and analog front-end. IC Role / Device Role / Timing Role: Mixed-signal SoC managing analog acquisition (SAR ADC), real-time waveform processing (DFB), and CapSense® touch interface. Use Value: 700 ksps SAR ADC captures high-fidelity ECG waveforms; integrated opamps condition low-amplitude biopotentials without external gain stages. |
| Smart Home Hub Controller | Automotive Body Control Module |
|
Use Scenario: Multi-protocol gateway aggregating Zigbee, BLE, and wired sensor data. IC Role / Device Role / Timing Role: Protocol translation and local decision engine - runs embedded TCP/IP stack, manages USB host for dongles, and drives LCD display. Use Value: 24 UDBs implement custom packet parsers; 60 GPIOs route I²C/SPI/UART simultaneously; LCD direct drive eliminates display controller IC. |
Use Scenario: Door module controlling window lift, mirror fold, and interior lighting with LIN communication. IC Role / Device Role / Timing Role: LIN 2.0 slave node with PWM-controlled motor drivers and analog feedback monitoring. Use Value: Integrated LIN peripheral reduces external transceiver count; 25 mA sink on SIO pins directly drive small relays or LEDs without buffer transistors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable SoC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY8C5868AXI-LP039 | Same CY8C55 family, 100-pin TQFP, 256 KB Flash, but adds 48 MHz USB-capable IMO and enhanced CapSense® tuning. | Higher pin count supports more analog channels and larger LCD; better suited for complex HMI designs with >32 touch electrodes. | Select when board layout allows TQFP and design requires additional GPIOs or advanced CapSense® self-test features. |
| STM32F303VCT6 | ARM Cortex-M4F core, 256 KB Flash, 48 KB SRAM, but lacks integrated analog configurability - requires external opamps, ADCs, and CapSense® controllers. | Strong DSP acceleration for motor control, but no unified analog routing matrix or SC/CT blocks - increases component count and PCB area. | Select when floating-point math or motor FOC algorithms dominate; avoid if analog integration, CapSense®, or rapid prototyping is critical. |
Compared with CY8C5568AXI-060, CY8C5868AXI-LP039 offers higher I/O density and refined CapSense® features at the cost of larger footprint, while STM32F303VCT6 trades analog integration for DSP performance - making CY8C5568AXI-060 optimal for mixed-signal consolidation in space-constrained designs.
Availability
CY8C5568AXI-060 is available at Aetrix Electronics and suitable for industrial sensor nodes, portable medical monitors, smart home hubs, and automotive body control modules requiring stable component supply across extended product lifecycles.
Supply support for CY8C5568AXI-060 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies acquired Cypress Semiconductor in 2020 and now owns the PSoC® portfolio. Infineon is a global semiconductor leader focused on power systems, automotive, and industrial applications.
The CY8C55 family was designed as a highly integrated, low-power programmable SoC platform targeting sensor fusion, human-machine interface, and real-time control - bridging the gap between MCU and ASIC flexibility.
FAQ
Does CY8C5568AXI-060 support USB device enumeration without external crystal?
No. Full-Speed USB 2.0 operation requires an external 24 MHz crystal connected to XTAL_IN/XTAL_OUT pins. The internal IMO cannot meet USB timing jitter specifications. USB enumeration fails without this crystal, even if internal PLL is used for system clock generation.
Can all 60 GPIOs be used simultaneously for analog input with the delta-sigma ADC?
Yes - the analog routing matrix allows any GPIO to connect to the delta-sigma ADC input multiplexer. However, simultaneous sampling across all 60 pins is not supported; the ADC sequentially scans configured channels via hardware-controlled sequencing or DMA-triggered conversions.
What is the maximum update rate for the 8-bit VDACs when routed to GPIO?
The four integrated VDACs achieve 5.5 Msps update rate when configured as current-output IDACs. As voltage-output VDACs, maximum update rate is 1 Msps due to settling time constraints of the internal buffer amplifier - verified in Electrical Specifications section 11.5 of the datasheet.
Is hibernate mode retention limited to SRAM only, or does it include register state?
Hibernate mode retains full SRAM contents and preserves the state of most analog and digital configuration registers, including UDB control registers, ADC setup, and clock tree settings. CPU core registers are not retained, requiring bootloader or reset vector restart upon wake-up.
CY8C5568AXI-060 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 100-LQFP
- Series:
- PSOC™ 5 CY8C55
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 67MHz
- Connectivity:
- I2C, LINbus, SPI, UART/USART, USB
- Peripherals:
- CapSense, DMA, LCD, POR, PWM, WDT
- Number of I/O:
- 60
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 1x20b, 2x12b; D/A 4x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C5568AXI-060 FAQ
1.How can I place an order for CY8C5568AXI-060 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C5568AXI-060 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C5568AXI-060 reliable?
The price and inventory of CY8C5568AXI-060 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C5568AXI-060 is usually 5 days.
3.What payment methods are accepted for CY8C5568AXI-060?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C5568AXI-060 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C5568AXI-060?
CY8C5568AXI-060 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C5568AXI-060 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C5568AXI-060?
For technical support, including CY8C5568AXI-060 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C5568AXI-060 requirements.
6.How does Aetrix verify that CY8C5568AXI-060 is sourced from the original manufacturer or authorized distributors?
All CY8C5568AXI-060 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C5568AXI-060 meets industry standards.
7.What is the process for return or replacement of CY8C5568AXI-060?
All CY8C5568AXI-060 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C5568AXI-060, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C5568AXI-060 part is unused and in its original packaging.
Return procedure for CY8C5568AXI-060:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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