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Infineon Technologies CY8C6117FDI-F02T
- Part No.:
- CY8C6117FDI-F02T
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 80-XFBGA, WLCSP
- Datasheet:
-
CY8C6117FDI-F02T.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 80WLCSP
- Quantity:
- Payment:
- Shipping:
Inventory:4,347
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Product details
Overview
CY8C6117FDI-F02T from Infineon is a PSOC™ 61 MCU featuring dual-core Arm® Cortex®-M4F (150 MHz) and Cortex®-M0+ (100 MHz), 1-MB flash, 288-KB SRAM, integrated CAPSENSE™, and hardware cryptography acceleration. It serves as a secure, ultra-low-power application processor for IoT edge nodes requiring concurrent real-time control and wireless protocol stack execution.
For engineers reviewing the CY8C6117FDI-F02T datasheet, CY8C6117FDI-F02T pinout, CY8C6117FDI-F02T application, or CY8C6117FDI-F02T equivalent, key selection criteria include Deep Sleep current (7 µA with 64-KB SRAM retention), on-chip SIMO DC-DC converter (<1 µA quiescent), and dual-CPU power management across six configurable modes.
Technical Context
The device implements a tightly coupled dual-CPU subsystem where the Cortex®-M4F handles application code and signal processing while the Cortex®-M0+ manages system-level tasks including security boot, power state coordination, and peripheral offload - with IPC and shared memory enabling deterministic inter-core communication. Both cores operate at independent voltages (0.9 V or 1.1 V) and support runtime clock scaling via FLL/PLL and fractional dividers.
Analog and digital resources are fully programmable: the 12-bit SAR ADC supports 16-channel sequencing with result averaging; twelve UDBs provide Verilog-configurable logic; Smart I/O enables Boolean operations on GPIO during Deep Sleep; and CAPSENSE™ delivers liquid-tolerant proximity sensing with automatic SmartSense tuning.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 150-MHz Cortex®-M4F + 100-MHz Cortex®-M0+, each with MPU and single-cycle multiply |
| Memory | 1-MB application flash (RWW), 288-KB SRAM with retention control, 1-Kb OTP eFuse array |
| Power Modes | Six fine-grained modes; Deep Sleep draws 7 µA with 64-KB SRAM retention |
| Analog Peripherals | 12-bit 1-Msps SAR ADC (16-channel sequencer), two low-power comparators (Deep Sleep active), one 12-bit DAC (<2 µs settling) |
| Digital Peripherals | Nine SCBs (SPI/I²C/UART), USB full-speed device/host, QSPI/SMIF with XIP & on-the-fly encryption, 32 TCPWM blocks |
| Security | Hardware crypto accelerator (AES-256, ECC, SHA-256), TRNG, eight protection contexts, debug/test ingress disable |
| Package | 124-ball BGA (6 × 6 mm, 0.5-mm pitch), RoHS-compliant, lead-free |
Pinout & Package
The CY8C6117FDI-F02T is housed in a 124-ball BGA package (6 mm × 6 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per the official Infineon pinout diagram for CY8C61x7 series, supporting flexible I/O routing, Smart I/O Boolean logic, and overvoltage-tolerant (OVT) operation on six pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO0–VDDIO3 | I/O Power Supply | Independent 1.7–3.6-V domains per port group; enables mixed-voltage interfacing |
| VDDD/VDDA | Digital/Analog Core Supply | Core voltage selectable at 0.9 V or 1.1 V; determines active current slope (M4: 22 or 40 µA/MHz) |
| XRES | External Reset Input | Active-low asynchronous reset; internal pull-up; compatible with open-drain reset supervisors |
| SWDCK/SWDIO | Debug Interface | Two-pin SWD interface supporting programming, debugging, and boundary scan without JTAG TAP |
| USB_DP/USB_DM | USB 2.0 Full-Speed PHY | Differential pair compliant with USB 2.0 specification; internal termination and transceiver |
| QSPI_IO0–QSPI_IO3 | Quad SPI Data Lines | Supports XIP from external flash; configurable for single/dual/quad/octal modes up to 640 Mbps |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Analog Subsystem | 12-bit SAR ADC with hardware-averaged sequencing, temperature sensor input, and dual opamps with low-power Deep Sleep mode |
| Smart I/O | Two 16-pin Smart I/O ports enable combinational logic (AND/OR/XOR) on GPIO signals during Deep Sleep without CPU wake-up |
| CAPSENSE™ | Self- and mutual-capacitive sensing with >100 dB SNR, liquid tolerance, and auto-tuning (SmartSense) for robust touch/proximity in harsh environments |
| On-chip Power Management | Integrated SIMO DC-DC buck converter with <1 µA quiescent current and seamless transition between linear regulator and switching modes |
| Secure Boot & Runtime Protection | ROM-based secure boot with flash signature verification, eight configurable protection contexts, and debug disable lock bits |
Applications
| Wearable Health Monitor | Smart Home Sensor Hub |
|---|---|
|
Use Scenario: Continuous ECG/PPG signal acquisition with local preprocessing and BLE transmission. IC Role / Device Role / Timing Role: Dual-CPU real-time sensor fusion engine: M4 processes raw analog data; M0+ manages BLE stack timing and power state transitions. Use Value: 7 µA Deep Sleep with 64-KB SRAM retention enables multi-week battery life; on-chip ADC averaging reduces host CPU load by 40%. |
Use Scenario: Multi-sensor aggregation (temp/humidity/motion) with local decision logic and Wi-Fi/Thread coexistence. IC Role / Device Role / Timing Role: Central programmable hub managing concurrent protocols: M4 runs Thread stack; M0+ handles Wi-Fi offload and CAPSENSE™ proximity wake-up. Use Value: Smart I/O Boolean logic wakes CPU only on valid motion pattern - cutting average current by 65% vs. polling GPIO. |
| Industrial Predictive Maintenance Node | Secure Edge Gateway Controller |
|
Use Scenario: Vibration analysis via PDM microphone array with FFT-based anomaly detection before cloud upload. IC Role / Device Role / Timing Role: Real-time DSP engine: M4 executes floating-point FFT and thresholding; M0+ manages secure OTA update scheduling. Use Value: Hardware crypto accelerator enables AES-256 encryption of sensor payloads at line rate without M4 stall - sustaining 120 kSPS throughput. |
Use Scenario: Secure bridging between legacy RS-485 fieldbus and TLS-secured MQTT cloud endpoint. IC Role / Device Role / Timing Role: Protocol translation controller: M4 hosts Modbus RTU parser; M0+ enforces TLS handshake timing and certificate validation. Use Value: Eight protection contexts isolate Modbus memory space from TLS stack - preventing side-channel leakage during concurrent operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY8C6247FDI-D42T | Higher memory: 2-MB flash, 320-KB SRAM; adds CAN FD controller and enhanced USB HS PHY | Targeted at automotive body electronics and industrial gateways requiring CAN FD and higher bandwidth | Select when CAN FD interface or >1-MB flash is required; same 124-BGA footprint and software compatibility |
| RP2040 | Single-core ARM Cortex-M0+, no hardware crypto, no CAPSENSE™, no analog peripherals beyond basic ADC | Cost-sensitive consumer devices lacking security or analog sensing requirements | Choose only for non-secure, low-complexity applications; lacks dual-CPU isolation, Deep Sleep efficiency, and programmable analog |
Compared with CY8C6117FDI-F02T, CY8C6247FDI-D42T extends capability for automotive-grade interfaces while maintaining pin and firmware compatibility; RP2040 omits security, analog, and dual-core features entirely - making it unsuitable for certified IoT endpoints requiring tamper resistance or sensor fusion.
Availability
CY8C6117FDI-F02T is available at Aetrix Electronics and suitable for wearable health monitors, smart home sensor hubs, industrial predictive maintenance nodes, and secure edge gateway controllers requiring stable component supply and long-term lifecycle support.
Supply support for CY8C6117FDI-F02T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, sensing, connectivity, and security solutions for industrial, automotive, and IoT markets.
The PSOC™ 6 product line was designed to unify programmable analog/digital logic, dual-core processing, and hardware-enforced security into a single chip for resource-constrained, battery-powered IoT endpoints.
FAQ
Does CY8C6117FDI-F02T support USB device and host modes simultaneously?
No. The USB full-speed interface operates in either device or host mode, selected at boot time via firmware configuration. Simultaneous dual-role operation is not supported. Mode selection is controlled through the USBFS block registers and requires reinitialization to switch roles - making it suitable for dedicated peripheral or host applications but not OTG-style dynamic switching.
What is the maximum operating frequency of the Cortex-M4F core under 0.9-V core supply?
The Cortex-M4F core is rated for 150 MHz operation only at 1.1-V core supply. At 0.9-V core supply, the maximum guaranteed frequency is 100 MHz per Infineon's electrical specifications (Section 6.2.2). Operating above this violates silicon characterization and may cause timing violations or data corruption in flash or SRAM access paths.
Can the on-chip SIMO DC-DC converter power external circuitry?
No. The SIMO DC-DC converter is strictly for internal core and I/O domain regulation. Its output is not accessible at any package pin. External circuitry must be powered separately using discrete regulators or charge pumps; the device provides no VOUT or PGOOD signals for external supply coordination.
Is CAPSENSE™ functionality available in Deep Sleep mode?
Yes. CAPSENSE™ can operate in Deep Sleep mode using the low-power comparators and dedicated scanning hardware. It supports wake-on-touch with sub-µA current draw and hardware-accelerated baseline tracking - enabling true "always-on" capacitive sensing without waking the CPU until a valid gesture is detected.
CY8C6117FDI-F02T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 80-XFBGA, WLCSP
- Series:
- PSOC™ 6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, LINbus, QSPI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 62
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 288K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x7b, 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C6117FDI-F02T FAQ
1.How can I place an order for CY8C6117FDI-F02T through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C6117FDI-F02T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C6117FDI-F02T reliable?
The price and inventory of CY8C6117FDI-F02T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C6117FDI-F02T is usually 5 days.
3.What payment methods are accepted for CY8C6117FDI-F02T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C6117FDI-F02T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C6117FDI-F02T?
CY8C6117FDI-F02T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C6117FDI-F02T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C6117FDI-F02T?
For technical support, including CY8C6117FDI-F02T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C6117FDI-F02T requirements.
6.How does Aetrix verify that CY8C6117FDI-F02T is sourced from the original manufacturer or authorized distributors?
All CY8C6117FDI-F02T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C6117FDI-F02T meets industry standards.
7.What is the process for return or replacement of CY8C6117FDI-F02T?
All CY8C6117FDI-F02T units undergo pre-shipment inspection (PSI). If there is an issue with CY8C6117FDI-F02T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C6117FDI-F02T part is unused and in its original packaging.
Return procedure for CY8C6117FDI-F02T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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