Infineon Technologies CY8C6136FDI-F42T
- Part No.:
- CY8C6136FDI-F42T
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 80-XFBGA, WLCSP
- Datasheet:
-
CY8C6136FDI-F42T.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 80WLCSP
- Quantity:
- Payment:

- Shipping:

Inventory:2,000
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Product details
Overview
CY8C6136FDI-F42T from Infineon is a dual-core PSOC™ 61 microcontroller featuring a 150-MHz Arm® Cortex®-M4F CPU and a dedicated 100-MHz Cortex®-M0+ for system control, 1-MB flash, 288-KB SRAM, integrated CAPSENSE™, USB Full-Speed device/host interface, and QSPI/XIP support - deployed in industrial IoT edge nodes requiring secure, low-power sensor fusion and local decision-making.
For engineers reviewing the CY8C6136FDI-F42T datasheet, CY8C6136FDI-F42T pinout, CY8C6136FDI-F42T application, or CY8C6136FDI-F42T equivalent, key selection criteria include dual-CPU power efficiency (22 µA/MHz @ 0.9 V M4), on-chip SIMO DC-DC converter (<1 µA quiescent), Deep Sleep current (7 µA with 64-KB SRAM retention), and hardware cryptographic acceleration for TLS/OTA updates.
Technical Context
The CY8C6136FDI-F42T implements a tightly coupled dual-CPU architecture where the Cortex®-M4F handles application workloads (including floating-point math and DSP) while the Cortex®-M0+ manages real-time system services, security boot, and peripheral arbitration - with IPC and shared memory enabling deterministic inter-core communication. Its clock system integrates FLL, PLL, IMO (±2%), ILO (32 kHz), and crystal oscillators (16–35 MHz), supporting dynamic voltage/frequency scaling across six power modes.
Analog subsystem includes a 12-bit 1-Msps SAR ADC with 16-channel sequencer and result averaging, two deep-sleep-capable comparators, a 12-bit DAC (<2 µs settling), and two opamps with low-power modes. Programmable digital resources comprise twelve UDBs (8 macrocells each), Smart I/O blocks for Boolean logic during Deep Sleep, and 32 TCPWM blocks supporting center-aligned PWM and comparator-triggered kill signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | 150-MHz Arm® Cortex®-M4F + 100-MHz Cortex®-M0+, with MPU and single-cycle multiply |
| Memory | 1-MB application flash (RWW), 288-KB SRAM with retention control, 1-Kb OTP eFuse |
| Power Efficiency | 22 µA/MHz (M4 @ 0.9 V core); 7 µA Deep Sleep current with 64-KB SRAM retention |
| Analog Peripherals | 12-bit 1-Msps SAR ADC (16-channel sequencer + averaging), 12-bit DAC (<2 µs settling), 2 opamps, 2 LP comparators |
| Digital Interfaces | 9 SCBs (8 configurable as SPI/I²C/UART, 1 Deep Sleep SCB), USB Full-Speed device/host, QSPI/SMIF with XIP & encryption |
| Security | Hardware crypto accelerator (AES-128/256, SHA-256, ECC), TRNG, 8 protection contexts, debug disable capability |
| Capacitive Sensing | CAPSENSE™ with SmartSense auto-tuning, liquid tolerance, and self/mutual sensing support up to 99 segments |
Pinout & Package
This device is housed in a 124-ball BGA package (6 × 6 mm, 0.5-mm pitch) with 100 usable GPIOs, including six overvoltage-tolerant (OVT) pins and two Smart I/O ports (16 I/Os total) supporting Boolean operations in Deep Sleep.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | General-purpose I/O bank 0 | Configurable drive strength/slew rate; supports capacitive sensing and Smart I/O logic |
| P1[0]–P1[7] | General-purpose I/O bank 1 | Includes USB D+/D− pins; supports analog input, comparator inputs, and opamp outputs |
| P12[0]–P12[7] | General-purpose I/O bank 12 | QSPI interface pins (IO0–IO3, SCLK, CS); supports octal mode up to 640 Mbps |
| VDDIO0/VDDIO1 | I/O supply rails | Independent 1.7–3.6 V domains per bank; enables mixed-voltage interfacing |
| VDDD/VDDA | Digital/analog core supplies | Core voltage selectable at 0.9 V or 1.1 V; VDDA powers precision analog circuits |
| XRES | External reset input | Active-low asynchronous reset; internal pull-up; compatible with pushbutton or supervisor ICs |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Power Management | Independent voltage scaling (0.9 V / 1.1 V) and clock gating per core enable sub-µA wake-from-Deep-Sleep latency |
| On-chip SIMO DC-DC Converter | Single-inductor, multi-output buck regulator with <1 µA quiescent current reduces external component count and PCB area |
| Hardware Crypto Acceleration | Dedicated AES/SHA/ECC engine offloads TLS handshake and firmware signature verification from CPU, preserving M4 bandwidth |
| Smart I/O in Deep Sleep | 16 GPIOs retain Boolean logic capability (AND/OR/XOR) during 7-µA Deep Sleep, enabling wake-on-pattern without CPU wake |
| CAPSENSE™ with SmartSense | Self-calibrating capacitive sensing eliminates manual tuning; supports proximity, slider, and liquid-tolerant touch in humid environments |
Applications
| Industrial Sensor Node | Smart Home Hub |
|---|---|
|
Use Scenario: Battery-powered wireless vibration and temperature monitor mounted on rotating machinery. IC Role / Device Role / Timing Role: Dual-core MCU performs FFT-based anomaly detection (M4), manages BLE/Wi-Fi coexistence (M0+), and maintains RTC-backed timestamping during 99% duty-cycled sleep. Use Value: 7-µA Deep Sleep with 64-KB SRAM retention extends battery life to >5 years; on-chip crypto secures OTA firmware updates against replay attacks. |
Use Scenario: Central hub aggregating Zigbee, Matter-over-Thread, and Bluetooth LE devices in residential HVAC/lighting control. IC Role / Device Role / Timing Role: M4 runs Matter SDK stack and local policy engine; M0+ handles USB CDC bridge to PC tools and manages CAPSENSE™ front-panel controls. Use Value: Integrated USB Full-Speed device/host eliminates external PHY; Smart I/O enables wake-on-button-press without waking M4, reducing average power by 32%. |
| Wearable Health Monitor | Secure Access Terminal |
|
Use Scenario: Clinical-grade wrist-worn ECG/PPG sensor with onboard signal conditioning and encrypted data storage. IC Role / Device Role / Timing Role: SAR ADC samples analog front-end at 1 Msps; DAC drives reference voltage; CAPSENSE™ detects electrode contact quality. Use Value: 12-bit ADC with result averaging achieves >80 dB SNR; hardware TRNG seeds AES-256 keys for HIPAA-compliant local data encryption. |
Use Scenario: Tamper-resistant door controller using fingerprint + NFC + PIN for multi-factor physical access. IC Role / Device Role / Timing Role: M4 executes biometric matching and secure boot; M0+ isolates NFC protocol stack and manages secure element interface. Use Value: Eight protection contexts enforce strict memory isolation between biometric, crypto, and UI subsystems; eFuse array stores immutable root-of-trust keys. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY8C6247FDI-D42T | Same package and pinout; adds 256-KB additional SRAM and 2-MB flash; no change to CPU clocks or analog specs | Better suited for applications requiring larger firmware images or real-time buffering (e.g., audio streaming) | Select when >1-MB flash or >288-KB SRAM is required; identical power/performance profile otherwise |
| STM32WB55RGV | Single Cortex-M4@64 MHz + Cortex-M0+@32 MHz; no on-chip DC-DC; 1-MB flash, 256-KB SRAM; BLE 5.0 radio integrated | Targeted at BLE-centric applications; lacks QSPI XIP, CAPSENSE™, and hardware crypto diversity (no ECC) | Choose only if BLE radio integration outweighs need for ultra-low Deep Sleep current and programmable analog/digital fabric |
Compared with CY8C6136FDI-F42T, CY8C6247FDI-D42T offers higher memory density without trade-offs in power or peripherals, while STM32WB55RGV sacrifices programmable analog/digital flexibility and Deep Sleep efficiency for integrated BLE radio - making CY8C6136FDI-F42T optimal for heterogeneous sensor fusion with local compute and robust security.
Availability
CY8C6136FDI-F42T is available at Aetrix Electronics and suitable for industrial sensor nodes, smart home hubs, wearable health monitors, and secure access terminals requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for CY8C6136FDI-F42T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive MCUs, and secure embedded solutions, with global R&D centers and ISO/TS 16949-certified manufacturing.
The PSOC™ 6 product line targets secure, ultra-low-power IoT endpoints - combining programmable analog/digital fabric with Arm dual-core processing to replace discrete signal-chain components and accelerate time-to-market for sensor-rich edge devices.
FAQ
What is the core voltage configuration for CY8C6136FDI-F42T?
This device operates its Cortex-M4F and Cortex-M0+ cores at either 0.9 V or 1.1 V, selected at manufacturing based on speed/power trade-off. The 0.9-V option delivers 22 µA/MHz (M4) and 15 µA/MHz (M0+) active current, while 1.1 V yields 40 µA/MHz and 20 µA/MHz - both configurations maintain full 150/100 MHz operation and are fixed per part number.
Does CY8C6136FDI-F42T support execute-in-place (XIP) from external flash?
Yes - its QSPI/SMIF interface supports XIP from external quad/octal SPI flash with on-the-fly AES-128 decryption and a dedicated 4-KB cache. This enables direct code execution from external memory while maintaining low power, eliminating need for large internal flash and simplifying firmware updates via external memory partitioning.
How many GPIOs support capacitive sensing on this device?
All 100 GPIOs are CAPSENSE™-capable, with hardware support for self-capacitance (up to 99 segments) and mutual-capacitance (up to 8 commons). The subsystem includes SmartSense auto-tuning, noise immunity algorithms, and dedicated hardware counters - enabling robust touch, proximity, and liquid-tolerant interfaces without CPU intervention.
Is USB functionality limited to device mode or does it support host operation?
CY8C6136FDI-F42T integrates a full-speed USB 2.0 PHY and controller supporting both device and host roles - including CDC, HID, MSC, and custom class implementations. It provides dedicated USB VBUS detection, internal transceivers, and DMA-accelerated transfers, enabling dual-role applications like USB-C dongles or field-programmable gateways.
CY8C6136FDI-F42T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 80-XFBGA, WLCSP
- Series:
- PSOC™ 6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 150MHz
- Connectivity:
- I2C, LINbus, QSPI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 62
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 32K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x7b, 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C6136FDI-F42T FAQ
1.How can I place an order for CY8C6136FDI-F42T through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C6136FDI-F42T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C6136FDI-F42T reliable?
The price and inventory of CY8C6136FDI-F42T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C6136FDI-F42T is usually 5 days.
3.What payment methods are accepted for CY8C6136FDI-F42T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C6136FDI-F42T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C6136FDI-F42T?
CY8C6136FDI-F42T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C6136FDI-F42T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C6136FDI-F42T?
For technical support, including CY8C6136FDI-F42T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C6136FDI-F42T requirements.
6.How does Aetrix verify that CY8C6136FDI-F42T is sourced from the original manufacturer or authorized distributors?
All CY8C6136FDI-F42T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C6136FDI-F42T meets industry standards.
7.What is the process for return or replacement of CY8C6136FDI-F42T?
All CY8C6136FDI-F42T units undergo pre-shipment inspection (PSI). If there is an issue with CY8C6136FDI-F42T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C6136FDI-F42T part is unused and in its original packaging.
Return procedure for CY8C6136FDI-F42T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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