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Infineon Technologies CY8C6144LQI-S4F92
- Part No.:
- CY8C6144LQI-S4F92
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 68-VFQFN Exposed Pad
- Datasheet:
-
CY8C6144LQI-S4F92.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 68QFN
- Quantity:
- Payment:
- Shipping:
Inventory:227
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Product details
Overview
CY8C6144LQI-S4F92 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSoC™ 61 MCU with 256 KB flash, 128 KB SRAM, integrated CAN FD, USB Full-Speed, and hardware cryptography acceleration-designed for secure, ultra-low-power IoT edge nodes requiring real-time sensor fusion and wireless coexistence.
For engineers reviewing the CY8C6144LQI-S4F92 datasheet, CY8C6144LQI-S4F92 pinout, CY8C6144LQI-S4F92 application, or CY8C6144LQI-S4F92 equivalent, key selection criteria include Deep Sleep current (7 µA), dual-CPU isolation architecture, on-chip DC-DC buck converter (<1 µA quiescent), QSPI XIP support, and hardware TRNG + AES/SHA accelerators.
Technical Context
The device implements a tightly coupled dual-CPU subsystem: the 150-MHz Cortex-M4F handles application processing with FPU and MPU, while the 100-MHz Cortex-M0+ is reserved exclusively for system-level functions including security boot, power management, and peripheral arbitration-no user application code runs on M0+.
Its programmable analog/digital fabric includes two synchronized 12-bit 2-Msps SAR ADCs, one 12-bit DAC (<2 µs settling), two opamps, two low-power comparators active in Deep Sleep, and CapSense™ CSD with SmartSense auto-tuning-enabling simultaneous sensing, signal conditioning, and secure connectivity without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Arm Cortex-M4F @ 150 MHz (application) + Cortex-M0+ @ 100 MHz (system-only, not user-accessible) |
| Memory | 256 KB application flash + 32 KB supervisory flash (RWW); 128 KB SRAM with per-block retention control |
| Low-Power Performance | 7 µA Deep Sleep current with 64 KB SRAM retention; on-chip DC-DC buck converter with <1 µA quiescent current |
| Analog Peripherals | Two 12-bit 2-Msps SAR ADCs (synchronized sampling, 16-channel sequencer); one 12-bit DAC (<2 µs settling) |
| Digital Interfaces | One CAN FD controller; six configurable SCBs (SPI/I²C/UART); USB Full-Speed device; QSPI/SMIF with XIP + 4 KB cache |
| Security Features | Hardware crypto accelerators (AES-128/256, SHA-1/256, ECC); TRNG; boot authentication via hardware hashing; eight protection contexts |
| Capacitive Sensing | CapSense™ CSD subsystem with liquid tolerance, proximity detection, and automatic SmartSense tuning |
Pinout & Package
Package: 80-pin TQFP (12 mm × 12 mm, 0.5 mm pitch). Pin mapping validated per Infineon datasheet 002-33480 Rev. *H, Section 4 "Pinouts".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0–P0.7 | GPIO / Smart I/O input/output | Programmable drive strength/slew rate; Smart I/O Boolean logic available during Deep Sleep |
| P1.0–P1.7 | GPIO / Analog input / CapSense™ electrode | Supports differential ADC inputs, CSD self/mutual sensing, and overvoltage-tolerant operation on P1.6/P1.7 |
| USB_DP / USB_DM | USB Full-Speed differential pair | Integrated PHY with internal termination; supports enumeration and HID/CDC class operation without external transceiver |
| CAN_TX / CAN_RX | CAN FD physical layer interface | Direct connection to external CAN transceiver; supports bit rates up to 5 Mbps with flexible data phase timing |
| VDDIO0 / VDDIO1 | I/O supply domains | Independent 1.7–3.6 V supplies per port group; enables mixed-voltage interfacing and dynamic I/O voltage scaling |
| XRES | External reset input | Active-low asynchronous reset with internal pull-up; debounced internally for robust system initialization |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Security Partitioning | M0+ core enforces secure boot, debug disable, and memory protection-prevents runtime tampering of M4F firmware |
| Deep Sleep Analog Operation | ADC, comparators, CapSense™, and temperature sensor remain functional at 7 µA system current-enables always-on sensing |
| QSPI Execute-In-Place (XIP) | Run code directly from external flash via 4-lane QSPI at up to 320 Mbps, with on-the-fly AES decryption and 4 KB cache |
| Segment LCD Driver | Drives up to 61 segments × 8 commons with dedicated hardware; operates in System Deep Sleep mode without CPU wake-up |
| Smart I/O Boolean Logic | 6-pin Smart I/O block performs AND/OR/XOR/NOT on GPIO states autonomously-reduces M4F interrupt load in event-driven systems |
Applications
| Smart Home Hub | Industrial Sensor Node |
|---|---|
|
Use Scenario: Central gateway aggregating BLE/Zigbee sub-devices while managing local UI, OTA updates, and secure cloud offload. IC Role / Device Role / Timing Role: Dual-core coordinator: M4F runs Linux-compatible RTOS and protocol stacks; M0+ manages secure boot, crypto offload, and power state transitions. Use Value: Hardware-accelerated AES/SHA and TRNG enable TLS 1.3 handshakes in <100 ms; 7 µA Deep Sleep extends battery life to >5 years on coin cell. |
Use Scenario: Battery-powered vibration/temperature node in predictive maintenance systems with CAN FD backhaul to PLC. IC Role / Device Role / Timing Role: Real-time sensor fusion engine: synchronized dual ADCs capture accelerometer and thermistor data; TCPWM triggers precise timestamped samples. Use Value: On-chip CAN FD controller eliminates external transceiver; Deep Sleep + Smart I/O enables wake-on-event with <2 µs latency and zero M4F intervention. |
| Wearable Health Monitor | Secure Access Terminal |
|
Use Scenario: Optical heart-rate and SpO₂ monitor with capacitive touch UI and Bluetooth LE telemetry. IC Role / Device Role / Timing Role: Integrated analog front-end: CSD detects finger presence; SAR ADC reads photodiode signals; DAC drives LED bias current with <2 µs settling. Use Value: SmartSense auto-tunes CapSense™ for wet-finger operation; synchronized ADC sampling rejects motion artifacts without host CPU overhead. |
Use Scenario: Physical access control panel with fingerprint reader, RFID, and encrypted audit logging. IC Role / Device Role / Timing Role: Trusted execution environment: M0+ validates biometric firmware signature pre-boot; crypto accelerator signs log entries with ECDSA-P256. Use Value: Eight protection contexts isolate fingerprint driver, RFID stack, and secure storage-prevents side-channel leakage between subsystems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32WB55RGV6 | Single Cortex-M4 + Cortex-M0+; no integrated CAN FD; 256 KB flash but only 64 KB SRAM; lacks hardware TRNG and dedicated CapSense™ | Targeted at Bluetooth LE + Zigbee dual-radio systems; insufficient for CAN-based industrial backhaul or high-channel-count analog sensing | Select when BLE coexistence and RF certification priority outweigh analog integration and CAN FD requirements |
| NXP LPC55S69JBD100 | Dual Cortex-M33 cores (both user-accessible); no CAN FD; 256 KB flash/320 KB SRAM; includes DSP extensions but no segment LCD driver or Smart I/O | Better for audio preprocessing or motor control; lacks Deep Sleep-optimized analog peripherals and secure boot partitioning | Choose for compute-intensive DSP workloads where M33 vector extensions matter more than ultra-low-power sensing or UI driving |
Compared with STM32WB55RGV6 and LPC55S69JBD100, CY8C6144LQI-S4F92 uniquely combines CAN FD, hardware-isolated secure boot, Deep Sleep-optimized analog, and Smart I/O-making it optimal for battery-powered industrial gateways and medical wearables demanding both security and sensing autonomy.
Availability
CY8C6144LQI-S4F92 is available at Aetrix Electronics and suitable for smart home hubs, industrial sensor nodes, wearable health monitors, and secure access terminals requiring stable component supply across multi-year production cycles.
Supply support for CY8C6144LQI-S4F92 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor leader specializing in power management, automotive ICs, and secure microcontrollers-with annual revenue exceeding €14 billion and global manufacturing in Dresden, Villach, and Kulim.
This device belongs to the PSoC™ 6 family, engineered specifically for secure, ultra-low-power IoT endpoints that integrate sensing, connectivity (CAN FD/USB/Bluetooth-ready), and trusted execution-without compromising real-time responsiveness or battery life.
FAQ
Is the Cortex-M0+ core accessible for user application code?
No. The Cortex-M0+ core in CY8C6144LQI-S4F92 is reserved exclusively for system-level functions-including secure boot, power management, interrupt arbitration, and peripheral control-and cannot be programmed with user application firmware. All application code must run on the Cortex-M4F core.
Does this part support external QSPI flash with execute-in-place (XIP)?
Yes. The QSPI/SMIF interface supports true XIP from external Quad SPI flash at up to 320 Mbps, with on-the-fly AES-128 decryption, 4 KB instruction cache, and hardware prefetch-enabling secure, low-power code execution without loading into internal RAM.
What is the lowest achievable system current in Deep Sleep mode?
The guaranteed maximum Deep Sleep current is 7 µA with 64 KB of SRAM retained, measured at 3.3 V and 25°C per Infineon datasheet 002-33480 Rev. *H. This includes active clocking for RTC, comparators, and CapSense™, with the DC-DC buck converter enabled.
Can the integrated CAN FD block operate independently of the M4F core?
Yes. The CAN FD peripheral includes dedicated message RAM, transmit/receive FIFOs, and programmable filters-allowing autonomous operation during Deep Sleep. It can wake the M4F core on frame reception or error events without CPU polling.
CY8C6144LQI-S4F92 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 68-VFQFN Exposed Pad
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz, 150MHz
- Connectivity:
- CANbus, I2C, LINbus, QSPI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 12b SAR, Sigma-Delta; D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C6144LQI-S4F92 FAQ
1.How can I place an order for CY8C6144LQI-S4F92 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C6144LQI-S4F92 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C6144LQI-S4F92 reliable?
The price and inventory of CY8C6144LQI-S4F92 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C6144LQI-S4F92 is usually 5 days.
3.What payment methods are accepted for CY8C6144LQI-S4F92?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C6144LQI-S4F92 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C6144LQI-S4F92?
CY8C6144LQI-S4F92 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C6144LQI-S4F92 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C6144LQI-S4F92?
For technical support, including CY8C6144LQI-S4F92 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C6144LQI-S4F92 requirements.
6.How does Aetrix verify that CY8C6144LQI-S4F92 is sourced from the original manufacturer or authorized distributors?
All CY8C6144LQI-S4F92 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C6144LQI-S4F92 meets industry standards.
7.What is the process for return or replacement of CY8C6144LQI-S4F92?
All CY8C6144LQI-S4F92 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C6144LQI-S4F92, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C6144LQI-S4F92 part is unused and in its original packaging.
Return procedure for CY8C6144LQI-S4F92:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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