My Inquiry
My Account
Infineon Technologies CY8C6145LQI-S3F12
- Part No.:
- CY8C6145LQI-S3F12
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 68-VFQFN Exposed Pad
- Datasheet:
-
CY8C6145LQI-S3F12.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 68QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,267
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CY8C6145LQI-S3F12 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSOC™ 61 MCU optimized for secure, ultra-low-power IoT edge nodes. It integrates 512 KB flash, 256 KB SRAM, hardware cryptography accelerator, CAN FD, USB FS, and CapSense™ capacitive sensing-enabling battery-powered smart sensors and industrial controllers with <7 µA Deep Sleep current and 150 MHz M4F performance.
For engineers reviewing the CY8C6145LQI-S3F12 datasheet, CY8C6145LQI-S3F12 pinout, CY8C6145LQI-S3F12 application, or CY8C6145LQI-S3F12 equivalent, key selection criteria include dual-CPU power/performance tradeoffs, on-chip DC-DC buck efficiency, SMIF XIP support for external QSPI flash, and hardware TRNG + eFuse-based secure boot implementation.
Technical Context
This device implements a tightly coupled dual-CPU subsystem where the Cortex-M4F handles application processing and real-time control while the Cortex-M0+ manages system-level services (e.g., BLE stack, security monitoring) and remains active in Deep Sleep mode. The M0+ is not user-accessible for application code per design constraint.
Its programmable analog-digital fabric includes a 12-bit 2-Msps SAR ADC with 16-channel sequencer, two low-power comparators operational in Hibernate, and CapSense™ CSD with SmartSense auto-tuning-enabling robust touch interfaces without host CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 150-MHz Cortex-M4F (with FPU & MPU) + 100-MHz Cortex-M0+ (system-only, not user-programmable) |
| Memory | 512 KB application flash (RWW), 256 KB SRAM (programmable retention), 1 KB OTP eFuse array |
| Power Efficiency | 7 µA Deep Sleep current with 64 KB SRAM retention; 22 µA/MHz M4F active current at 0.9 V core |
| Analog Peripherals | 12-bit 2-Msps SAR ADC (16-channel sequencer, result averaging), 2x low-power comparators (Deep Sleep/Hibernate capable) |
| Digital Interfaces | 7 configurable SCBs (SPI/I²C/UART), 1 CAN FD block, 1 USB Full-Speed device, Quad-SPI/SMIF with XIP + AES encryption |
| Capacitive Sensing | CapSense™ CSD subsystem with sigma-delta architecture, liquid tolerance, self/mutual sensing, and hardware SmartSense tuning |
| Security Features | Hardware crypto accelerator (AES-128/256, SHA-256, ECC), TRNG, secure boot with ROM hash verification, 8 protection contexts |
Pinout & Package
Package: 100-pin TQFP (14 mm × 14 mm, 0.5 mm pitch), 64 GPIOs, including 2 overvoltage-tolerant (OVT) pins and 2 Smart I/O ports (8 pins total) supporting Boolean logic in Deep Sleep.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | GPIO / Smart I/O Port 0 | Supports combinational logic (AND/OR/XOR) in Deep Sleep; programmable drive strength/slew rate |
| P1[0]–P1[7] | GPIO / Smart I/O Port 1 | Same Smart I/O capability as Port 0; enables autonomous peripheral interaction without waking CPUs |
| VDDIO0–VDDIO3 | I/O Power Domains | Independent 1.7–3.6 V supply domains per port group; supports mixed-voltage interfacing |
| VDDD / VDDA | Digital & Analog Core Supplies | Separate 1.7–3.6 V supplies; VDDA powers ADC/comparators; internal LDOs support single-rail operation |
| XRES | External Reset Input | Active-low asynchronous reset; internal pull-up; compatible with open-drain reset supervisors |
| SWDCK / SWDIO | ARM Serial Wire Debug Interface | 2-pin debug interface; supports programming, trace, and secure debug disable via eFuse |
Key Features
| Feature | Design Value |
|---|---|
| Dual-Voltage Core Operation | User-selectable 1.1 V or 0.9 V core voltage per CPU, enabling dynamic tradeoff between performance (150 MHz M4F @ 1.1 V) and ultra-low-power operation (22 µA/MHz @ 0.9 V) |
| On-Chip DC-DC Buck Converter | Integrated buck regulator with <1 µA quiescent current; eliminates need for external PMIC in space-constrained IoT designs |
| SMIF with On-the-Fly Encryption | Quad-SPI interface supporting Execute-In-Place (XIP) from external flash with hardware AES-128 decryption-enables secure firmware expansion without SRAM footprint penalty |
| CapSense™ Hardware Subsystem | Dedicated CSD block with automatic calibration, noise immunity up to 20 Vpp common-mode, and proximity detection without CPU cycles |
| Backup Domain with RTC | 64-byte retention memory + real-time clock powered by VBACKUP; maintains timekeeping during main power loss with nanoampere leakage |
Applications
| Smart Home Sensor Hub | Industrial Predictive Maintenance Node |
|---|---|
|
Use Scenario: Battery-powered multi-sensor node (temp, humidity, vibration, touch) aggregating data for BLE/Wi-Fi gateway upload. IC Role / Device Role / Timing Role: Central controller executing sensor fusion, CapSense™ UI, secure OTA updates, and low-latency CAN FD communication to motor drives. Use Value: 7 µA Deep Sleep extends 2-AA battery life beyond 5 years; hardware crypto ensures signed firmware validation before execution. |
Use Scenario: Edge vibration analyzer mounted on rotating equipment, performing FFT-based anomaly detection locally before cloud transmission. IC Role / Device Role / Timing Role: Real-time signal processor using M4F's FPU for 128-point FFT, SAR ADC oversampling, and TCPWM-triggered acquisition windows. Use Value: 2-Msps ADC with 16-channel sequencer captures synchronized multi-axis vibration waveforms; Smart I/O offloads GPIO debouncing autonomously. |
| Medical Wearable Controller | Automotive Body Control Module (BCM) Subsystem |
|
Use Scenario: ECG/PPG patch with dry-electrode sensing, motion compensation, and Bluetooth LE telemetry. IC Role / Device Role / Timing Role: Analog front-end manager (ADC, comparators, temperature sensor), CapSense™ for buttonless wake-on-touch, and secure BLE link layer handling. Use Value: Low-power comparators remain active in Hibernate to detect physiological events; TRNG seeds session keys for HIPAA-compliant BLE pairing. |
Use Scenario: Door module controlling window lift, mirror fold, and interior lighting with LIN/CAN FD interconnect. IC Role / Device Role / Timing Role: Secondary controller managing local actuator timing, fault logging, and secure firmware updates via CAN FD bootloader. Use Value: CAN FD block supports 5 Mbps payload bursts for rapid parameter reconfiguration; eFuse-based secure boot prevents unauthorized firmware injection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY8C6247FDI-D52 | Higher flash (1 MB) and SRAM (320 KB); adds AIROC™ Wi-Fi/Bluetooth combo radio; no CAN FD block | Better suited for wireless gateway roles requiring local protocol bridging (e.g., Matter-to-Zigbee), but lacks automotive-grade CAN FD | Select when integrated wireless connectivity outweighs CAN FD requirement and board space permits larger QFN package |
| STM32H743VI | Single-core Cortex-M7 (480 MHz), no hardware CapSense™ or dedicated low-power comparators; requires external crypto IC for equivalent security | Higher raw compute throughput for vision/audio preprocessing, but higher active current (120 µA/MHz) and no autonomous Deep Sleep peripherals | Choose for compute-intensive tasks where external component count and sleep autonomy are secondary to peak performance |
Compared with CY8C6145LQI-S3F12, CY8C6247FDI-D52 trades CAN FD for integrated wireless and larger memory, while STM32H743VI offers higher M7 clock speed but lacks hardware-accelerated capacitive sensing and sub-µA Deep Sleep peripherals-making CY8C6145LQI-S3F12 optimal for battery-powered, sensor-rich, CAN-connected edge nodes.
Availability
CY8C6145LQI-S3F12 is available at Aetrix Electronics and suitable for smart home sensor hubs, industrial predictive maintenance nodes, medical wearables, and automotive body control modules requiring stable component supply, long-term lifecycle assurance, and qualified automotive-grade variants.
Supply support for CY8C6145LQI-S3F12 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor leader specializing in power management, sensing, security, and microcontroller solutions for industrial, automotive, and IoT markets.
This part belongs to the PSoC™ 61 family-designed specifically for secure, ultra-low-power edge intelligence in resource-constrained IoT endpoints, combining programmable analog/digital fabric with Arm dual-core processing and hardware-enforced trust anchors.
FAQ
Is the Cortex-M0+ core accessible for user application code?
No. The Cortex-M0+ in CY8C6145LQI-S3F12 is reserved exclusively for system functions-including BLE stack management, security monitoring, and interrupt arbitration-and is not exposed to user firmware. Application code must run solely on the Cortex-M4F core, with IPC used for controlled communication to the M0+ subsystem.
Does this device support external QSPI flash with execute-in-place (XIP)?
Yes. The SMIF peripheral supports XIP from external quad SPI flash with hardware AES-128 decryption enabled. It includes a 4-KB cache to reduce fetch latency and power consumption during instruction execution, and supports single/dual/quad I/O modes with up to 320 Mbps throughput.
What is the minimum supply voltage for Deep Sleep operation with full SRAM retention?
The device maintains full 64 KB SRAM retention in Deep Sleep mode down to 1.7 V VDDD supply. At 1.7 V, typical Deep Sleep current is 7 µA; operation below 1.7 V is outside absolute maximum ratings and not guaranteed.
Can CapSense™ operate independently while the CPUs are in Hibernate mode?
Yes. The CapSense™ CSD subsystem operates autonomously in Hibernate mode using the 32-kHz ILO clock. It can perform baseline tracking, finger detection, and generate interrupts to wake the system-all without CPU involvement or SRAM retention, reducing total system power to ~1.5 µA.
CY8C6145LQI-S3F12 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 68-VFQFN Exposed Pad
- Series:
- PSOC™ 6
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit
- Speed:
- 150MHz
- Connectivity:
- eMMC/SD/SDIO, FIFO, I2C, IrDA, LINbus, Microwire, QSPI, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, DMA, LCD, LVD, POR, PWM, Temp Sensor, WDT
- Number of I/O:
- 53
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x8b, 16x10/12b SAR, Sigma-Delta; D/A 2x7/8b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C6145LQI-S3F12 FAQ
1.How can I place an order for CY8C6145LQI-S3F12 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C6145LQI-S3F12 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C6145LQI-S3F12 reliable?
The price and inventory of CY8C6145LQI-S3F12 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C6145LQI-S3F12 is usually 5 days.
3.What payment methods are accepted for CY8C6145LQI-S3F12?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C6145LQI-S3F12 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C6145LQI-S3F12?
CY8C6145LQI-S3F12 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C6145LQI-S3F12 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C6145LQI-S3F12?
For technical support, including CY8C6145LQI-S3F12 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C6145LQI-S3F12 requirements.
6.How does Aetrix verify that CY8C6145LQI-S3F12 is sourced from the original manufacturer or authorized distributors?
All CY8C6145LQI-S3F12 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C6145LQI-S3F12 meets industry standards.
7.What is the process for return or replacement of CY8C6145LQI-S3F12?
All CY8C6145LQI-S3F12 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C6145LQI-S3F12, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C6145LQI-S3F12 part is unused and in its original packaging.
Return procedure for CY8C6145LQI-S3F12:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CY8C6145LQI-S3F12 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
Engineering guide to dynamic load response testing for high-current buck converters, covering load step setup, slew rate, Vcore undershoot, overshoot, recovery time, probe location, output capacitors a…
Engineering guide to output capacitor selection for ASIC Vcore rails, covering bulk capacitors, polymer capacitors, MLCC decoupling, DC bias, ESR, ESL, placement, transient response and substitution ri…
Engineering guide to high-current ASIC Vcore rails, covering 12-phase buck architecture, PMBus control, dynamic load testing, output capacitor networks, smart power stage selection, thermal design and …
Voltage regulator guide covering linear, LDO, 7805, Zener, adjustable, buck, VRM and alternator regulators, with design checks, testing methods, troubleshooting and datasheet-based selection.
Amplifier guide covering voltage, current and power amplification, gain, feedback, amplifier classes, audio and RF applications, op-amp circuits, transimpedance amplifiers, datasheet selection and trou…
