Infineon Technologies CY8C6244AZQ-S4D93

Overview

CY8C6244AZQ-S4D93 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSOC™ 62 microcontroller with 256-KB flash, 128-KB SRAM, integrated CAN FD, USB Full-Speed, and hardware cryptography acceleration-designed for secure, ultra-low-power IoT edge nodes requiring real-time sensor fusion and wireless coexistence.

For engineers reviewing the CY8C6244AZQ-S4D93 datasheet, CY8C6244AZQ-S4D93 pinout, CY8C6244AZQ-S4D93 application, or CY8C6244AZQ-S4D93 equivalent, this MCU delivers verified Deep Sleep current of 7 µA with 64-KB SRAM retention, on-chip DC-DC buck converter (<1-µA quiescent), and programmable analog (dual 12-bit 2-Msps SAR ADCs, DAC, opamps, comparators) for mixed-signal system-on-chip integration.

Technical Context

The device implements a tightly coupled dual-CPU subsystem: a 150-MHz Cortex-M4F with FPU and MPU handles real-time control and signal processing, while a 100-MHz Cortex-M0+ manages low-power background tasks and peripheral orchestration. Inter-processor communication (IPC) and shared memory enable deterministic task partitioning.

Its clock architecture integrates an 8-MHz IMO (±2%), 32-kHz ILO, configurable crystal oscillators (16–35 MHz & 32 kHz), PLL, and FLL-supporting dynamic voltage/frequency scaling across six power modes. The SMIF interface enables XIP from external Quad-SPI Flash with on-the-fly encryption and 4-KB cache.

Key Specifications

Pinout & Package

This device is housed in an 80-pin TQFP package (12 mm × 12 mm, 0.5 mm pitch) with exposed thermal pad, optimized for industrial temperature range (–40°C to +85°C) and PCB-level EMI resilience.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core secure MCU applications.

Compared with RP2040 and STM32H743VI, CY8C6244AZQ-S4D93 uniquely combines dual asymmetric cores, certified secure boot, CAN FD, hardware crypto, and full programmable analog-enabling single-chip implementation of battery-operated, sensor-rich, and wirelessly connected industrial endpoints without external signal conditioning or security co-processors.

Availability

CY8C6244AZQ-S4D93 is available at Aetrix Electronics and suitable for industrial sensor nodes, secure wireless gateways, medical wearables, and automotive body control modules requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for CY8C6244AZQ-S4D93 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, automotive ICs, and secure microcontrollers-with annual revenue exceeding €14 billion and global manufacturing in Dresden, Villach, and Kulim.

This part belongs to the PSoC™ 62 product line, engineered specifically for secure, ultra-low-power IoT endpoints that demand integrated analog, wireless coexistence, and hardware-enforced trust-bridging the gap between microcontroller simplicity and SoC-level functionality.

FAQ

What is the maximum operating frequency of each CPU core in the CY8C6244AZQ-S4D93?

The Arm Cortex-M4F core operates at up to 150 MHz with single-cycle multiply and integrated FPU, while the Cortex-M0+ core runs at up to 100 MHz with single-cycle multiply and MPU. Both cores support independent voltage scaling (0.9 V or 1.1 V) to optimize performance versus power consumption based on real-time workload demands.

Does CY8C6244AZQ-S4D93 support hardware-accelerated AES encryption?

Yes-it includes a dedicated cryptography accelerator supporting AES-128 and AES-256 in ECB, CBC, CTR, and GCM modes, with DMA-assisted data transfer and key protection via eFuse and secure memory regions. This enables authenticated encryption of sensor data or firmware images without consuming M4F cycles.

Can the onboard SAR ADCs operate during Deep Sleep mode?

Yes, both 12-bit SAR ADCs support Deep Sleep operation with synchronized sampling, differential/single-ended input, and 16-channel sequencer-including result averaging and automatic calibration. They retain full functionality while the M4F and M0+ cores remain powered down, enabling periodic sensor acquisition at <10 µA system current.

What is the purpose of the Smart I/O block in this MCU?

The Smart I/O block comprises six dedicated GPIOs that execute Boolean logic (AND/OR/XOR/NOT) autonomously during Deep Sleep-without waking either CPU. It enables event-driven wake-up (e.g., button press, sensor threshold breach) using only hardware state machines, reducing average system power and improving real-time responsiveness.