Infineon Technologies CY8C6244LQI-S4D12
- Part No.:
- CY8C6244LQI-S4D12
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 68-VFQFN Exposed Pad
- Datasheet:
-
CY8C6244LQI-S4D12.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 68QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CY8C6244LQI-S4D12 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSOC™ 62 microcontroller with 256 KB flash, 128 KB SRAM, integrated CAN FD, USB Full-Speed, and hardware cryptography acceleration. It operates from 1.7–3.6 V, achieves 7 µA Deep Sleep current with 64 KB SRAM retention, and targets secure, low-power IoT edge nodes requiring real-time sensor fusion and wireless coexistence.
For engineers reviewing the CY8C6244LQI-S4D12 datasheet, CY8C6244LQI-S4D12 pinout, CY8C6244LQI-S4D12 application, or CY8C6244LQI-S4D12 equivalent, key selection criteria include dual-CPU power/performance trade-off, on-chip DC-DC buck efficiency below 1 µA quiescent current, QSPI XIP with on-the-fly encryption, and hardware-accelerated AES/SHA/TRNG for secure firmware updates.
Technical Context
The device integrates two independent CPU subsystems: a 150-MHz Cortex-M4F with FPU and MPU for application processing, and a 100-MHz Cortex-M0+ for real-time control and low-power background tasks. Inter-processor communication (IPC) enables synchronized task partitioning and secure context isolation across eight protection contexts.
Its programmable analog subsystem includes two 12-bit 2-Msps SAR ADCs with synchronized sampling and Deep Sleep operation, one 12-bit DAC with <2-µs settling time, two opamps, and two low-power comparators - all functional in Deep Sleep mode to support always-on sensing without wake-up latency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 150-MHz Arm Cortex-M4F + 100-MHz Cortex-M0+, each with single-cycle multiply and MPU |
| Memory | 256 KB application flash (RWW), 32 KB supervisory flash, 128 KB SRAM with programmable retention granularity |
| Low-Power Performance | 7 µA Deep Sleep current with 64 KB SRAM retention; on-chip DC-DC buck with <1 µA quiescent current |
| Analog Peripherals | Two 12-bit 2-Msps SAR ADCs (16-channel sequencer, result averaging), one 12-bit DAC (<2 µs settling), two opamps, two LP comparators |
| Digital Interfaces | Six configurable SCBs (SPI/I²C/UART), one Deep Sleep SCB, USB Full-Speed device, one CAN FD block, QSPI/SMIF with XIP and hardware encryption |
| Security | ROM-based Secure Boot, execute-only memory, debug/test ingress disable, hardware crypto accelerators (AES, SHA, ECC, TRNG) |
| Operating Voltage | 1.7 V to 3.6 V supply range; user-selectable core logic at 1.1 V or 0.9 V for dynamic power scaling |
Pinout & Package
This device is housed in an 80-pin TQFP package (LQI suffix), with 62 GPIOs including six Smart I/O pins supporting Boolean operations in Deep Sleep, two overvoltage-tolerant (OVT) pins, and dedicated JTAG/SWJ debug interface pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | General-purpose I/O bank 0 | Configurable drive modes, slew rates; supports capacitive sensing (CSD) and Smart I/O logic |
| P1[0]–P1[7] | General-purpose I/O bank 1 | Includes two OVT pins; supports analog input, comparator inputs, and TCPWM capture |
| P12[0]–P12[7] | General-purpose I/O bank 12 | Supports LCD segment/common outputs and QSPI data lines (IO0–IO3) |
| SWDCLK / SWDIO | JTAG/SWJ debug interface | Provides non-intrusive debug access; can be disabled permanently for production security |
| VDDA / VSSA | Analog power supply/ground | Separate analog domain for ADC/DAC/Opamp operation; requires local decoupling for noise immunity |
| USB_DP / USB_DM | USB Full-Speed differential pair | Integrated transceiver compliant with USB 2.0 FS; no external PHY required |
| CAN_TX / CAN_RX | CAN FD physical layer interface | Dedicated pins for CAN FD controller; supports bit rates up to 5 Mbps with flexible data phase |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Power Gating | Independent voltage scaling (0.9 V / 1.1 V) and clock gating per core enable fine-grained energy optimization for mixed workloads |
| QSPI XIP with Encryption | Execute-in-place from external flash with on-the-fly AES decryption and 4-KB cache reduces boot latency and external memory bandwidth |
| Deep Sleep Analog Operation | ADC, DAC, comparators, and opamps remain active in Deep Sleep mode, enabling continuous sensor monitoring without CPU wake-up |
| Hardware Crypto Acceleration | Dedicated engines for AES-128/256, SHA-1/256, ECC P-256, and TRNG deliver cryptographic throughput without CPU overhead or software stack vulnerability |
| Smart I/O Logic | Six GPIOs form a programmable logic block supporting Boolean functions (AND/OR/XOR) and state machines during system Deep Sleep |
Applications
| Industrial Sensor Node | Secure Wireless Gateway |
|---|---|
|
Use Scenario: Battery-powered vibration and temperature monitoring in predictive maintenance systems. IC Role / Device Role / Timing Role: Dual-core runtime partitioning: M0+ handles ADC sampling, filtering, and CAN FD telemetry; M4F runs ML inference and secure OTA update verification. Use Value: 7 µA Deep Sleep with 64 KB SRAM retention extends battery life to >5 years; on-chip DC-DC buck minimizes voltage conversion loss. |
Use Scenario: BLE/Wi-Fi gateway aggregating data from multiple sensor clusters and forwarding via TLS-secured cloud uplink. IC Role / Device Role / Timing Role: M4F executes ModusToolbox™ middleware, TLS stack, and USB CDC virtual COM; M0+ manages BLE HCI transport and hardware crypto offload. Use Value: Hardware AES/SHA/TRNG accelerates TLS handshake by 8× vs. software-only; USB Full-Speed enables direct PC-side firmware recovery without external programmer. |
| Capacitive Touch HMI | Automotive Body Control Module |
|
Use Scenario: Waterproof touch panel for smart home appliances with proximity wake-up and liquid tolerance. IC Role / Device Role / Timing Role: CAPSENSE™ CSD subsystem performs self/mutual sensing with SmartSense auto-tuning; M0+ processes gesture logic in Deep Sleep. Use Value: Best-in-class SNR and automatic calibration eliminate manual tuning; Smart I/O enables wake-on-touch with zero CPU involvement. |
Use Scenario: Low-voltage body electronics node controlling door locks, interior lighting, and LIN bus peripherals. IC Role / Device Role / Timing Role: CAN FD interface communicates with central ECU; segmented LCD driver displays status; opamps condition hall-effect sensor signals. Use Value: Integrated CAN FD PHY eliminates external transceiver; 1.7–3.6 V operation supports wide automotive battery range; OTP eFuse stores calibration data. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32WB55RGV6 | Single Cortex-M4 core with Cortex-M0+ radio controller; lacks dual-application CPU, no on-chip DC-DC, lower analog integration (no DAC/opamps) | Optimized for Bluetooth LE + MCU integration; not suitable for simultaneous high-throughput analog acquisition and CAN FD comms | Select when BLE coexistence is primary requirement and analog peripheral count is minimal |
| NXP LPC55S69JBD100 | Dual Cortex-M33 cores with TrustZone; no CAN FD, no integrated DC-DC, higher Deep Sleep current (25 µA) | Focused on secure boot and trusted execution; weaker low-power analog subsystem and no QSPI XIP encryption | Select when hardware-enforced security isolation (TrustZone) outweighs ultra-low-power analog and CAN FD needs |
Compared with STM32WB55RGV6 and LPC55S69JBD100, CY8C6244LQI-S4D12 uniquely combines dual-application CPU performance, sub-10 µA Deep Sleep with full analog operation, CAN FD + USB + QSPI encryption, and hardware crypto - making it optimal for resource-constrained, multi-interface IoT edge controllers.
Availability
CY8C6244LQI-S4D12 is available at Aetrix Electronics and suitable for industrial sensor nodes, secure wireless gateways, capacitive touch HMIs, and automotive body control modules requiring stable component supply across long-lifecycle deployments.
Supply support for CY8C6244LQI-S4D12 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive ICs, and secure microcontrollers, with global R&D and manufacturing infrastructure.
The PSOC™ 62 product line delivers programmable, ultra-low-power, and security-hardened MCUs for IoT endpoints - integrating analog, digital, and radio-adjacent peripherals into a single chip to reduce system complexity and bill-of-materials cost.
FAQ
What is the maximum operating frequency of each CPU core in the CY8C6244LQI-S4D12?
The CY8C6244LQI-S4D12 features a 150-MHz Arm Cortex-M4F core with floating-point unit and memory protection unit, and a 100-MHz Cortex-M0+ core with single-cycle multiply and MPU. Both cores operate independently with separate clock trees and voltage domains, enabling concurrent real-time and application-level processing without contention.
Does this MCU support hardware-accelerated cryptographic operations, and which algorithms are implemented?
Yes, the CY8C6244LQI-S4D12 includes a dedicated cryptography accelerator supporting AES-128/256 (ECB/CBC/CTR/GCM), SHA-1/256, ECC P-256, and true random number generation (TRNG). These functions execute in hardware without CPU intervention, reducing latency and eliminating software-based side-channel vulnerabilities in secure boot and TLS operations.
Can the device perform analog-to-digital conversion while in Deep Sleep mode?
Yes, both 12-bit SAR ADCs operate fully in Deep Sleep mode with synchronized sampling, 16-channel sequencer, and result averaging. The ADCs retain configuration and can trigger interrupts or DMA transfers upon completion - enabling continuous sensor monitoring at 7 µA system current without waking the CPU cores.
What package type and pin count does the CY8C6244LQI-S4D12 use, and are there thermal or layout considerations?
The CY8C6244LQI-S4D12 uses an 80-pin TQFP (Thin Quad Flat Package) with 0.5-mm pitch and exposed thermal pad. Layout requires solid ground plane beneath the pad, symmetric thermal vias (≥6 × 0.3-mm), and strict separation between analog (VDDA/VSSA) and digital (VDDD/VSSD) power domains to maintain ADC/DAC accuracy and noise immunity.
CY8C6244LQI-S4D12 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 68-VFQFN Exposed Pad
- Series:
- PSOC™ 6
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+, ARM® Cortex®-M4F
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 100MHz, 150MHz
- Connectivity:
- FIFO, I2C, LINbus, QSPI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR, 10b Sigma-Delta; D/A 2x7/8b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C6244LQI-S4D12 FAQ
1.How can I place an order for CY8C6244LQI-S4D12 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C6244LQI-S4D12 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C6244LQI-S4D12 reliable?
The price and inventory of CY8C6244LQI-S4D12 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C6244LQI-S4D12 is usually 5 days.
3.What payment methods are accepted for CY8C6244LQI-S4D12?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C6244LQI-S4D12 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C6244LQI-S4D12?
CY8C6244LQI-S4D12 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C6244LQI-S4D12 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C6244LQI-S4D12?
For technical support, including CY8C6244LQI-S4D12 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C6244LQI-S4D12 requirements.
6.How does Aetrix verify that CY8C6244LQI-S4D12 is sourced from the original manufacturer or authorized distributors?
All CY8C6244LQI-S4D12 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C6244LQI-S4D12 meets industry standards.
7.What is the process for return or replacement of CY8C6244LQI-S4D12?
All CY8C6244LQI-S4D12 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C6244LQI-S4D12, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C6244LQI-S4D12 part is unused and in its original packaging.
Return procedure for CY8C6244LQI-S4D12:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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