My Inquiry
My Account
Infineon Technologies CY8C6245FNI-S3D11T
- Part No.:
- CY8C6245FNI-S3D11T
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 49-XBGA, WLCSP
- Datasheet:
-
CY8C6245FNI-S3D11T.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 49WLCSP
- Quantity:
- Payment:
- Shipping:
Inventory:1,681
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CY8C6245FNI-S3D11T from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSOC™ 62 microcontroller with 512 KB flash, 256 KB SRAM, integrated CAN FD, USB Full-Speed, and hardware cryptography accelerator-designed for secure, ultra-low-power IoT edge nodes requiring concurrent real-time control and wireless protocol stack execution.
For engineers reviewing the CY8C6245FNI-S3D11T datasheet, CY8C6245FNI-S3D11T pinout, CY8C6245FNI-S3D11T application, or CY8C6245FNI-S3D11T equivalent, key selection considerations include dual-CPU power efficiency (22 µA/MHz @ 0.9 V M4), Deep Sleep current (7 µA w/64 KB SRAM retention), on-chip DC-DC converter (<1 µA quiescent), and QSPI XIP with hardware encryption.
Technical Context
This MCU implements a tightly coupled dual-CPU subsystem where the Cortex-M4F handles complex protocol stacks and signal processing while the Cortex-M0+ manages low-latency peripheral control and system housekeeping-interconnected via IPC and shared memory with hardware-enforced protection contexts. Clocking combines FLL (IMO-based) and PLL (external crystal-based) for dynamic frequency scaling across six power modes.
The programmable analog/digital fabric includes a 12-bit 2-Msps SAR ADC with 16-channel sequencer, two Deep Sleep-capable comparators, CAPSENSE™ CSD with SmartSense auto-tuning, and TCPWMs supporting center-aligned PWM with comparator-triggered kill signals-enabling sensor fusion, motor control, and capacitive HMI in a single chip.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 150-MHz Cortex-M4F + 100-MHz Cortex-M0+, each with MPU and independent power domains |
| Memory | 512-KB flash (RWW), 256-KB SRAM (programmable retention), 1-Kb OTP eFuse for security keys |
| Power Efficiency | 7 µA Deep Sleep current with 64-KB SRAM retention; 22 µA/MHz active slope @ 0.9 V core for M4 |
| Analog Peripherals | 12-bit 2-Msps SAR ADC (16-channel sequencer, result averaging), two LP comparators active in Deep Sleep |
| Digital Interfaces | CAN FD controller, USB Full-Speed device, 7 configurable SCBs (SPI/I²C/UART), QSPI/SMIF with XIP + AES encryption |
| Security | ROM-based Secure Boot, hardware crypto accelerator (AES/SHA/RSA/ECC), TRNG, 8 protection contexts |
| Capacitive Sensing | CAPSENSE™ CSD with liquid tolerance, self/mutual mode support, and automatic SmartSense tuning |
Pinout & Package
CY8C6245FNI-S3D11T is housed in a 100-pin TQFP package (14 mm × 14 mm, 0.5 mm pitch) with 64 GPIOs-including two Smart I/O ports (8 pins), two overvoltage-tolerant (OVT) pins, and dedicated debug (SWD/JTAG) and power management pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[7] | GPIO / Smart I/O Port A | Programmable logic gates (AND/OR/XOR) on signals during Deep Sleep; supports Boolean operations without CPU wake-up |
| P1[0]–P1[7] | GPIO / Smart I/O Port B | Same Smart I/O capability as Port A; enables autonomous sensor preprocessing and HMI event filtering |
| USB_DP / USB_DM | USB Full-Speed differential pair | Integrated transceiver compliant with USB 2.0 FS; no external PHY required for HID, CDC, or MSC class devices |
| CAN_TX / CAN_RX | CAN FD physical layer interface | Direct connection to external CAN transceiver; supports bit rates up to 5 Mbps with flexible data-length coding |
| VDDIO0–VDDIO3 | I/O power domains | Four independent 1.7–3.6 V I/O banks enable mixed-voltage interfacing (e.g., 1.8 V sensors + 3.3 V radios) |
| VDDD / VDDA | Digital/analog core supplies | Separate regulated inputs allow optimized noise isolation between CPU, SRAM, and ADC subsystems |
| XRES | External reset input | Active-low asynchronous reset with internal pull-up; compatible with pushbutton or supervisor IC assertion |
| SWDCLK / SWDIO | ARM Serial Wire Debug interface | Two-pin debug port supporting programming, real-time trace, and secure debug disable via eFuse lock |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU voltage scaling | User-selectable 1.1 V or 0.9 V core operation per CPU-enables fine-grained trade-off between performance and sub-µA sleep leakage |
| QSPI XIP with encryption | Execute-in-place from external flash with on-the-fly AES-128 decryption and 4-KB cache-reduces boot time and external memory bandwidth |
| Deep Sleep SCB | One serial block remains active in Deep Sleep mode, configurable as SPI or I²C for sensor polling without waking CPUs |
| Segment LCD driver | Drives up to 63 segments × 8 commons directly-eliminates external display controller in battery-powered HMI applications |
| Hardware CAPSENSE™ | Capacitive sigma-delta (CSD) engine with built-in IDACs, shield drivers, and SmartSense auto-calibration-achieves >100:1 SNR in wet environments |
Applications
| Smart Home Sensor Hub | Industrial Edge Controller |
|---|---|
|
Use Scenario: Battery-powered multi-sensor node aggregating temperature, humidity, motion, and touch inputs for BLE/Wi-Fi gateway communication. IC Role / Device Role / Timing Role: Dual-core runtime partitioning: M0+ handles CAPSENSE™ scan, ADC sampling, and low-power timer scheduling; M4 runs BLE stack and data preprocessing. Use Value: 7 µA Deep Sleep with 64 KB SRAM retention extends 2-AA battery life beyond 5 years; Smart I/O filters false touch events autonomously. |
Use Scenario: DIN-rail mounted PLC module controlling motors, reading analog field sensors, and communicating via CAN FD to higher-level controllers. IC Role / Device Role / Timing Role: M4 executes PID loops and CAN FD messaging; M0+ manages GPIO-based safety interlocks and watchdog supervision with deterministic latency. Use Value: Integrated CAN FD block eliminates external transceiver and level-shifter components; TCPWM kill signals respond within 100 ns to overcurrent faults. |
| Wearable Health Monitor | Secure IoT Gateway |
|
Use Scenario: Chest-worn ECG/PPG patch with dry-electrode sensing, motion compensation, and encrypted Bluetooth transmission. IC Role / Device Role / Timing Role: M0+ continuously samples analog front-end (ADC + comparators) in Deep Sleep; M4 wakes only for FFT analysis and BLE advertising. Use Value: On-chip temperature sensor calibrates ADC gain drift; hardware TRNG seeds BLE link encryption keys without software entropy bottlenecks. |
Use Scenario: Cellular-connected smart meter concentrator aggregating data from 100+ sub-meters via RS-485 and LoRaWAN uplink. IC Role / Device Role / Timing Role: M4 hosts Linux-compatible RTOS, TLS stack, and QSPI XIP firmware; M0+ manages isolated secure boot and crypto key vault access. Use Value: ROM-based Secure Boot prevents unauthorized firmware updates; hardware AES engine accelerates TLS handshake by 4× vs. software-only implementation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP LPC55S69 | Single Cortex-M33 core with TrustZone; no integrated CAN FD or segment LCD driver; 256 KB SRAM, 640 KB flash | Lacks native CAN FD and Deep Sleep SCB-requires external transceiver and additional logic for low-power sensor polling | Prefer when TrustZone-based software isolation suffices and CAN FD is not required |
| Renesas RA6M5 | Dual-core Arm Cortex-M33/M33 (lockstep optional); 1 MB flash, 512 KB SRAM; includes CAN FD, USB, but no CAPSENSE™ or Smart I/O | No hardware capacitive sensing or autonomous GPIO logic-requires external touch controller and FPGA/CPLD for Deep Sleep preprocessing | Prefer for high-reliability industrial control where lockstep execution and ASIL-B compliance are mandatory |
Compared with LPC55S69 and RA6M5, CY8C6245FNI-S3D11T uniquely integrates CAPSENSE™, Smart I/O, and dual-voltage CPU scaling-enabling lower BOM cost and longer battery life in resource-constrained IoT endpoints without sacrificing security or real-time responsiveness.
Availability
CY8C6245FNI-S3D11T is available at Aetrix Electronics and suitable for smart home hubs, industrial edge controllers, wearable health monitors, and secure IoT gateways requiring stable component supply across multi-year production cycles.
Supply support for CY8C6245FNI-S3D11T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive MCUs, and secure embedded solutions-with leadership in silicon carbide, radar, and PSoC programmable systems-on-chip.
CY8C6245FNI-S3D11T belongs to the PSoC™ 62 product line, engineered specifically for ultra-low-power, secure, and sensor-rich IoT endpoints-combining programmable analog/digital fabric with Arm dual-core architecture to eliminate discrete signal conditioning and interface components.
FAQ
Does CY8C6245FNI-S3D11T support JTAG debugging?
Yes, it supports standard ARM JTAG and Serial Wire Debug (SWD) interfaces via dedicated SWDCLK and SWDIO pins. Debug access can be permanently disabled using eFuse-based security lockdown, preventing post-deployment firmware extraction or modification.
What is the maximum operating frequency of the Cortex-M4F core?
The Cortex-M4F core operates at up to 150 MHz when powered at 1.1 V, or 100 MHz at 0.9 V. Frequency is derived from the PLL (fed by external crystal) or FLL (fed by internal IMO), with integer/fractional clock dividers enabling precise peripheral timing.
Can the on-chip DC-DC converter power external circuitry?
No-the integrated buck converter is designed exclusively for internal core and I/O domain regulation. Its output is not accessible externally; it delivers regulated VDDD/VDDIO rails with <1 µA quiescent current and supports dynamic voltage scaling based on CPU load and mode.
Is CAPSENSE™ functionality available in Deep Sleep mode?
Yes-CAPSENSE™ CSD hardware operates autonomously in Deep Sleep mode using the low-power ILO clock. It can perform full-button scans and generate interrupts upon touch detection without waking either CPU, reducing average system current to sub-µA levels.
CY8C6245FNI-S3D11T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 49-XBGA, WLCSP
- Series:
- PSOC™ 6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+, ARM® Cortex®-M4F
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 100MHz, 150MHz
- Connectivity:
- FIFO, I2C, IrDA, LINbus, MMC/SD/SDIO, QSPI, SmartCard, SPI, UART/USART
- Peripherals:
- Bluetooth, Brown-out Detect/Reset, Cap Sense, DMA, LCD, LVD, POR, PWM, SmartSense, WDT
- Number of I/O:
- 37
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR, 10b Sigma-Delta; D/A 2x7/8b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C6245FNI-S3D11T FAQ
1.How can I place an order for CY8C6245FNI-S3D11T through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C6245FNI-S3D11T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C6245FNI-S3D11T reliable?
The price and inventory of CY8C6245FNI-S3D11T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C6245FNI-S3D11T is usually 5 days.
3.What payment methods are accepted for CY8C6245FNI-S3D11T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C6245FNI-S3D11T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C6245FNI-S3D11T?
CY8C6245FNI-S3D11T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C6245FNI-S3D11T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C6245FNI-S3D11T?
For technical support, including CY8C6245FNI-S3D11T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C6245FNI-S3D11T requirements.
6.How does Aetrix verify that CY8C6245FNI-S3D11T is sourced from the original manufacturer or authorized distributors?
All CY8C6245FNI-S3D11T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C6245FNI-S3D11T meets industry standards.
7.What is the process for return or replacement of CY8C6245FNI-S3D11T?
All CY8C6245FNI-S3D11T units undergo pre-shipment inspection (PSI). If there is an issue with CY8C6245FNI-S3D11T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C6245FNI-S3D11T part is unused and in its original packaging.
Return procedure for CY8C6245FNI-S3D11T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CY8C6245FNI-S3D11T Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
Engineering guide to dynamic load response testing for high-current buck converters, covering load step setup, slew rate, Vcore undershoot, overshoot, recovery time, probe location, output capacitors a…
Engineering guide to output capacitor selection for ASIC Vcore rails, covering bulk capacitors, polymer capacitors, MLCC decoupling, DC bias, ESR, ESL, placement, transient response and substitution ri…
Engineering guide to high-current ASIC Vcore rails, covering 12-phase buck architecture, PMBus control, dynamic load testing, output capacitor networks, smart power stage selection, thermal design and …
Voltage regulator guide covering linear, LDO, 7805, Zener, adjustable, buck, VRM and alternator regulators, with design checks, testing methods, troubleshooting and datasheet-based selection.
Amplifier guide covering voltage, current and power amplification, gain, feedback, amplifier classes, audio and RF applications, op-amp circuits, transimpedance amplifiers, datasheet selection and trou…
