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Infineon Technologies CY8C624AAZI-S2D14
- Part No.:
- CY8C624AAZI-S2D14
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 128-LQFP
- Datasheet:
-
CY8C624AAZI-S2D14.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 128TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:233
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Product details
Overview
CY8C624AAZI-S2D14 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSOC™ 62 microcontroller in 100-ball WLCSP package, featuring 2048 KB flash, 1024 KB SRAM, and integrated CAPSENSE™, USB FS, QSPI/XIP, and hardware cryptography. It operates from 1.7–3.6 V with Deep Sleep current as low as 7 µA (64 KB SRAM retained), targeting secure, ultra-low-power IoT edge nodes with LCD or capacitive touch interfaces.
For engineers reviewing the CY8C624AAZI-S2D14 datasheet, CY8C624AAZI-S2D14 pinout, CY8C624AAZI-S2D14 application, or CY8C624AAZI-S2D14 equivalent, key selection criteria include dual-CPU power efficiency at 0.9 V/1.1 V core voltage, on-chip DC-DC converter (<1 µA quiescent), 32 TCPWMs with kill-signal triggering, and SMIF throughput up to 640 Mbps for external flash XIP.
Technical Context
The device integrates two tightly coupled Arm cores: a 150-MHz Cortex-M4F with FPU and MPU, and a 100-MHz Cortex-M0+ with MPU-both supporting dynamic voltage scaling (0.9 V or 1.1 V). Inter-processor communication uses hardware IPC channels with doorbell interrupts and shared memory.
Its programmable analog subsystem includes a 12-bit 2-Msps SAR ADC with 16-channel sequencer and averaging, two Deep Sleep-capable comparators, and an on-die temperature sensor. The digital fabric features Smart I/O (16 pins) for Boolean logic during Deep Sleep and 32 configurable TCPWMs with center-aligned/PWM modes and comparator-triggered fault shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 150-MHz Cortex-M4F + 100-MHz Cortex-M0+, both with MPU and single-cycle multiply |
| Memory | 2048 KB flash (RWW), 32 KB AUXflash, 32 KB SFlash, 1024 KB SRAM (3 retention-controllable blocks) |
| Power Efficiency | Deep Sleep mode draws 7 µA with 64 KB SRAM retention; active slope: 27 µA/MHz (M4 @ 0.9 V) |
| Analog Peripherals | 12-bit 2-Msps SAR ADC (16-channel sequencer, result averaging), 2 LP comparators (active in Deep Sleep) |
| Communication | 13 SCBs (configurable as SPI/I²C/UART), USB Full-Speed device, QSPI/SMIF (640 Mbps, XIP + AES encryption) |
| Security | ROM-based Secured Boot, hardware crypto accelerator (AES/SHA/RSA/ECC), TRNG, 8 protection contexts |
| Capacitive Sensing | CAPSENSE™ CSD with SmartSense™ auto-tuning, >100 dB SNR, liquid-tolerant self/mutual sensing |
Pinout & Package
This device is packaged in a 100-ball Wafer-Level Chip Scale Package (WLCSP) with 0.4 mm pitch, optimized for space-constrained IoT endpoints. Pin functions are validated per Infineon's official pinout diagram (Document 002-23185 Rev. *S, Page 32).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO0–VDDIO5 | I/O Power Supply | Independent 1.7–3.6 V domains per port group; enables mixed-voltage interfacing and selective power gating |
| VDDD | Digital Core Supply | Supplies M4/M0+ cores and digital fabric; connects to on-chip DC-DC buck converter output |
| VDDR | Regulator Input | Input to integrated DC-DC converter; supports ultra-low-quiescent operation (<1 µA) |
| XRES | Reset Input | Active-low asynchronous reset; internal pull-up; compatible with external reset supervisors |
| SWDCK/SWDIO | Debug Interface | 2-pin SWD interface for programming and debug; accessible even when most peripherals are powered down |
| P0[0]–P0[7] | GPIO Bank 0 | Includes Smart I/O capability; supports Boolean logic in Deep Sleep; 6 pins overvoltage-tolerant (OVT) |
Key Features
| Feature | Design Value |
|---|---|
| Dual-Voltage Core Operation | User-selectable 0.9 V or 1.1 V CPU supply enables optimal trade-off between performance (150 MHz M4) and sub-30 µA/MHz active current |
| Execute-in-Place (XIP) with Encryption | QSPI/SMIF supports real-time AES decryption of code fetched directly from external flash-no RAM copy required for secure firmware execution |
| Smart I/O in Deep Sleep | 16 GPIOs across two Smart I/O ports perform Boolean logic (AND/OR/XOR) autonomously while system clocks are halted, reducing wake-up latency |
| Hardware CAPSENSE™ Tuning | SmartSense™ auto-calibrates sensor baselines and thresholds in real time-eliminates manual tuning for varying environmental conditions or liquid presence |
| Programmable TCPWM Fault Handling | Comparator outputs can trigger immediate PWM kill signals with <100 ns response-critical for motor control and power stage safety |
Applications
| Wearable Health Monitor | Smart Home Sensor Hub |
|---|---|
|
Use Scenario: Compact wrist-worn device measuring heart rate, skin temperature, and motion via analog sensors and PDM mics. IC Role / Device Role / Timing Role: Dual-core MCU handles sensor fusion (M4) and BLE protocol stack (M0+); CAPSENSE™ enables touchless gesture UI. Use Value: 7 µA Deep Sleep with 64 KB SRAM retention extends battery life to >14 days on coin cell; on-die temperature sensor eliminates BOM cost of external thermistor. |
Use Scenario: Battery-powered multi-sensor node aggregating CO₂, humidity, occupancy, and ambient light for HVAC control. IC Role / Device Role / Timing Role: Central controller managing 13 SCBs for diverse sensor interfaces (I²C CO₂, UART PIR, SPI light), with USB for local config and firmware updates. Use Value: Integrated DC-DC converter maintains >90% efficiency down to 10 µA load-enabling stable 3.3 V rail from declining primary battery voltage. |
| Industrial Edge Gateway | Secure Access Control Panel |
|
Use Scenario: DIN-rail mounted gateway collecting Modbus RTU data from legacy PLCs and forwarding via TLS-secured MQTT to cloud. IC Role / Device Role / Timing Role: M4 executes protocol translation and crypto; M0+ manages watchdog supervision and low-latency GPIO monitoring for emergency stop inputs. Use Value: Hardware crypto accelerator offloads AES-256/TLS handshake from CPU-reducing M4 utilization by 45% during encrypted comms bursts. |
Use Scenario: Tamper-resistant door panel with fingerprint reader, NFC tag, and LED keypad requiring secure boot and runtime attestation. IC Role / Device Role / Timing Role: Root-of-trust MCU authenticates biometric firmware images using ROM-based Secured Boot and eFuse-locked keys. Use Value: One-time-programmable 1-Kb eFuse array stores immutable device identity and cryptographic keys-prevents cloning and firmware rollback attacks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CY8C6247FDI-D52 | Same PSOC™ 62 architecture but in 124-ball BGA; higher pin count (102 GPIO vs. 80), no WLCSP form factor | Better suited for PCBs with space for BGA and need for additional SCBs or TCPWMs | Select when board layout allows BGA and requires maximum peripheral flexibility-not for ultra-compact wearables |
| STM32WB55RGV | Single-core Cortex-M4 @ 64 MHz + dedicated Cortex-M0+ radio core; Bluetooth LE 5.0 integrated; 1 MB flash, 256 KB RAM | Optimized for wireless SoC use cases; lacks CAPSENSE™, SMIF/XIP, and Smart I/O capabilities | Choose only if Bluetooth connectivity is mandatory and capacitive touch, external flash XIP, or Deep Sleep logic are not required |
Compared with CY8C6247FDI-D52 and STM32WB55RGV, the CY8C624AAZI-S2D14 uniquely combines WLCSP packaging, hardware-accelerated CAPSENSE™, and SMIF-based encrypted XIP-making it the only option for secure, touch-enabled, space-constrained IoT nodes needing external flash execution without RAM footprint penalty.
Availability
CY8C624AAZI-S2D14 is available at Aetrix Electronics and suitable for wearable health monitors, smart home sensor hubs, industrial edge gateways, and secure access control panels requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for CY8C624AAZI-S2D14 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor leader specializing in power systems, automotive MCUs, and secure embedded solutions, with R&D centers across Europe, Asia, and the Americas.
The PSOC™ 62 product line targets secure, ultra-low-power IoT endpoints-designed to unify programmable analog/digital fabric, dual-core processing, and hardware-rooted security in a single chip for battery-operated edge devices.
FAQ
What is the maximum operating frequency of each CPU core in CY8C624AAZI-S2D14?
The Cortex-M4F core runs at up to 150 MHz with floating-point unit and memory protection, while the Cortex-M0+ core operates at up to 100 MHz with single-cycle multiply and its own MPU. Both cores support dynamic voltage scaling between 0.9 V and 1.1 V, enabling optimized performance-per-milliwatt trade-offs verified in Infineon's electrical specifications (Section 6.2.2).
Does CY8C624AAZI-S2D14 support external flash execution with hardware encryption?
Yes-it features a Quad-SPI/Serial Memory Interface (SMIF) that enables Execute-in-Place (XIP) from external flash with on-the-fly AES-128 decryption. The SMIF includes a 4-KB cache to reduce power during XIP and supports octal interface modes up to 640 Mbps, as confirmed in the functional description (Section 3.5.4) and electrical specs (Section 6.4.4).
How many GPIOs support overvoltage tolerance, and what is the rating?
Six GPIO pins (designated as OVT-capable in the pinout table) tolerate voltages up to 5.5 V regardless of VDDIO level-verified in the Absolute Maximum Ratings table (Section 6.1) and GPIO electrical specifications (Section 6.2.4). These pins are distributed across Port 0 and Port 1 and retain OVT functionality in all power modes except Hibernate.
Can CAPSENSE™ operate during Deep Sleep mode, and what is the minimum current draw?
Yes-CAPSENSE™ CSD scanning can run autonomously during Deep Sleep using the ILO clock source, drawing as little as 12 µA total system current (including SAR ADC and CSD logic) as measured in Section 6.2.2. This enables continuous touch detection without waking the CPU, with SmartSense™ auto-tuning maintaining accuracy across temperature and moisture variations.
CY8C624AAZI-S2D14 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 128-LQFP
- Series:
- PSOC™ 6
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+, ARM® Cortex®-M4F
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 100MHz, 150MHz
- Connectivity:
- eMMC/SD/SDIO, FIFO, I2C, IrDA, LINbus, Microwire, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, I2S, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 102
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR, 10b Sigma-Delta; D/A 2x7/8b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY8C624AAZI-S2D14 FAQ
1.How can I place an order for CY8C624AAZI-S2D14 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY8C624AAZI-S2D14 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY8C624AAZI-S2D14 reliable?
The price and inventory of CY8C624AAZI-S2D14 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY8C624AAZI-S2D14 is usually 5 days.
3.What payment methods are accepted for CY8C624AAZI-S2D14?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY8C624AAZI-S2D14 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY8C624AAZI-S2D14?
CY8C624AAZI-S2D14 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY8C624AAZI-S2D14 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY8C624AAZI-S2D14?
For technical support, including CY8C624AAZI-S2D14 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY8C624AAZI-S2D14 requirements.
6.How does Aetrix verify that CY8C624AAZI-S2D14 is sourced from the original manufacturer or authorized distributors?
All CY8C624AAZI-S2D14 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY8C624AAZI-S2D14 meets industry standards.
7.What is the process for return or replacement of CY8C624AAZI-S2D14?
All CY8C624AAZI-S2D14 units undergo pre-shipment inspection (PSI). If there is an issue with CY8C624AAZI-S2D14, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY8C624AAZI-S2D14 part is unused and in its original packaging.
Return procedure for CY8C624AAZI-S2D14:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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