Infineon Technologies CY8C6336BZI-BLF03

Overview

CY8C6336BZI-BLF03 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSoC™ 63 microcontroller with integrated Bluetooth® LE 5.0 radio, 1-MB flash, 288-KB SRAM, and programmable analog/digital peripherals. It operates from 1.7 V to 3.6 V, achieves 7 µA Deep Sleep current with 64-KB SRAM retention, and supports QSPI XIP with hardware encryption - deployed in battery-powered IoT edge nodes requiring secure wireless sensor aggregation.

For engineers reviewing the CY8C6336BZI-BLF03 datasheet, CY8C6336BZI-BLF03 pinout, CY8C6336BZI-BLF03 application, or CY8C6336BZI-BLF03 equivalent, key selection criteria include dual-CPU power efficiency (22 µA/MHz @ 0.9 V on M4), BLE link-layer concurrency (4 simultaneous connections), SAR ADC performance (12-bit, 1-Msps, 16-channel sequencer), and Smart I/O™ capability for GPIO Boolean logic during Deep Sleep.

Technical Context

The device implements a tightly coupled dual-CPU subsystem where the Cortex-M4F handles real-time signal processing and security-critical tasks while the Cortex-M0+ manages BLE protocol stack and low-power housekeeping. Both cores share memory-mapped peripherals via a high-bandwidth interconnect and coordinate via IPC and dual DMA controllers (16 channels each).

Its Bluetooth® LE subsystem integrates a 2.4-GHz RF transceiver with –95 dBm RX sensitivity, programmable TX output up to +4 dBm, and a hardware-accelerated Link Layer engine supporting master/slave roles and 2 Mbps PHY - all operating within the same 3.3-V supply domain as the MCU core and SIMO buck converter.

Key Specifications

Pinout & Package

CY8C6336BZI-BLF03 is housed in a 104-ball Wafer-Level Chip-Scale Package (WLCSP, BZI suffix), with 0.4-mm ball pitch and thermal pad on underside. Pin assignment follows Infineon's standardized PSoC™ 63 BGA/WLCSP footprint, supporting high-density PCB layouts and thermal dissipation via soldered thermal pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core BLE MCU applications.

Compared with nRF5340 and DA1469x, CY8C6336BZI-BLF03 uniquely combines dual-FPU-capable cores, integrated high-precision analog, Smart I/O™ logic, and hardware-accelerated crypto - enabling full sensor-to-cloud processing within one die without external signal conditioning or voltage regulation.

Availability

CY8C6336BZI-BLF03 is available at Aetrix Electronics and suitable for wireless sensor nodes, smart home hubs, industrial predictive maintenance systems, and wearable health monitors requiring stable component supply and long-term lifecycle support.

Supply support for CY8C6336BZI-BLF03 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, automotive MCUs, and secure connectivity solutions, with over 30 years of industrial-grade reliability heritage.

CY8C6336BZI-BLF03 belongs to the PSoC™ 63 product line - designed specifically for secure, ultra-low-power IoT endpoints that integrate wireless connectivity, rich analog sensing, and real-time edge processing in constrained form factors.

FAQ

What is the maximum supported clock frequency for the Cortex-M4F core?

The Cortex-M4F core in CY8C6336BZI-BLF03 operates at up to 150 MHz, achievable using the on-chip PLL driven by the 8-MHz Internal Main Oscillator (IMO) or an external crystal. Frequency stability is maintained via hardware-calibrated PLL loop parameters stored in SFlash, and the core supports dynamic voltage scaling between 0.9 V and 1.1 V to optimize performance versus power.

Does this part support external QSPI flash execution with encryption?

Yes - the Serial Memory Interface (SMIF) supports Execute-In-Place (XIP) from external quad SPI flash with on-the-fly AES-128 decryption. The 4-KB SMIF cache improves instruction fetch efficiency, and encryption keys are managed in secure memory regions accessible only to the cryptography accelerator, ensuring firmware confidentiality during runtime.

How many simultaneous BLE connections does the on-chip radio support?

The integrated Bluetooth® LE 5.0 subsystem supports up to four simultaneous connections in concurrent master/slave roles. This is implemented in hardware via the dedicated Link Layer engine, which handles packet scheduling, encryption, and state management independently of the application CPUs - enabling mesh proxy, beaconing, and central-peripheral coexistence without CPU intervention.

Is the Smart I/O™ functionality available during Deep Sleep mode?

Yes - Smart I/O™ logic remains fully operational during Deep Sleep mode, allowing Boolean operations (AND, OR, XOR, NOT) on up to 16 GPIOs without waking either CPU. Each Smart I/O™ port includes configurable LUTs and flip-flops, and its configuration is retained in dedicated low-power registers powered by the backup domain, enabling autonomous sensor event filtering at sub-µA quiescent current.