Infineon Technologies CY8C6347FMI-BUD33T

Overview

CY8C6347FMI-BUD33T from Infineon is a dual-core Arm® Cortex®-M4F/M0+ microcontroller with integrated Bluetooth® LE 5.0 radio, 1-MB flash, 288-KB SRAM, and programmable analog/digital peripherals. It operates from 1.7 V to 3.6 V, supports Deep Sleep at 7 µA with 64-KB SRAM retention, and delivers up to 4 dBm TX power and –95 dBm RX sensitivity. Used in battery-powered IoT edge nodes requiring secure wireless sensor aggregation and local decision-making.

For engineers reviewing the CY8C6347FMI-BUD33T datasheet, CY8C6347FMI-BUD33T pinout, CY8C6347FMI-BUD33T application, or CY8C6347FMI-BUD33T equivalent, key selection criteria include dual-CPU power efficiency (22 µA/MHz @ 0.9 V on M4), Bluetooth LE link-layer concurrency (4 simultaneous connections), QSPI XIP with hardware encryption, and CAPSENSE™ liquid-tolerant proximity sensing capability.

Technical Context

The device implements a tightly coupled dual-CPU subsystem where the Cortex-M4F handles real-time signal processing and protocol stacks while the Cortex-M0+ manages low-power BLE link-layer operations and peripheral offload. Both cores share memory-mapped peripherals via a high-bandwidth interconnect, with IPC and DMA enabling zero-copy data movement between domains.

Its Bluetooth LE subsystem integrates a 2.4-GHz RF transceiver, digital PHY, and dedicated Link Layer engine-supporting master/slave roles, 2 Mbps data rate, and RSSI with 4-dB resolution-while remaining fully synchronized with the SIMO buck converter and Deep Sleep domain for sub-µA system-level idle current.

Key Specifications

Pinout & Package

This device is packaged in a 104-ball Wafer-Level Chip-Scale Package (WLCSP) with 0.4-mm pitch, designed for space-constrained portable and wearable IoT endpoints. The package supports full I/O access, thermal dissipation via die attach pad, and compatibility with standard reflow profiles.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core BLE MCU applications.

Compared with nRF52840 and DA1469x, CY8C6347FMI-BUD33T uniquely combines dual-CPU power partitioning, hardware crypto acceleration, CAPSENSE™, and QSPI XIP with decryption-making it optimal for secure, sensor-rich, battery-constrained IoT endpoints requiring local intelligence and minimal BOM count.

Availability

CY8C6347FMI-BUD33T is available at Aetrix Electronics and suitable for smart wearables, industrial wireless sensors, connected home locks, and asset tracking beacons requiring stable component supply, long-lifecycle support, and qualified automotive-grade traceability.

Supply support for CY8C6347FMI-BUD33T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, sensing, connectivity, and security solutions for industrial, automotive, and IoT markets.

The PSoC™ 63 product line targets secure, ultra-low-power wireless edge devices-integrating MCU, BLE, programmable analog/digital logic, and hardware security into a single chip to reduce system complexity and certification effort.

FAQ

What is the maximum operating frequency of the Cortex-M4F core in CY8C6347FMI-BUD33T?

The Cortex-M4F core operates at up to 150 MHz when powered at 1.1 V, and at reduced frequency (typically ≤100 MHz) when powered at 0.9 V for ultra-low-power operation. Frequency scaling is dynamically controlled via the Power Management Unit and supported by hardware PLL/FLL clock generators as documented in the TRM section 3.2.3.

Does CY8C6347FMI-BUD33T support over-the-air (OTA) firmware updates via Bluetooth LE?

Yes-it supports secure OTA updates using the ModusToolbox™ bootloader with dual-bank flash layout, hardware AES-128 decryption, and signature verification via ROM-based Secure Boot. The BLE subsystem handles transport, while the M0+ manages flash write/erase sequencing and rollback protection without M4 intervention.

Can the CAPSENSE™ subsystem operate during Deep Sleep mode?

No-CAPSENSE™ requires the IMO or external clock and active analog power domains, so it cannot run in Deep Sleep. However, Smart I/O ports can detect touch-induced GPIO transitions and wake the device in <50 µs, enabling low-latency wake-from-sleep for capacitive interfaces.

Is an external crystal required for Bluetooth LE radio operation?

No-the integrated 32-kHz ILO provides sufficient timing accuracy for BLE advertising and connection intervals, though a 32-kHz crystal improves timing precision for long-duration connections. The 2.4-GHz RF synthesizer uses its own internal VCO and reference dividers, independent of system clocks.