Infineon Technologies CY8C6347FMI-BUD53T

Overview

CY8C6347FMI-BUD53T from Infineon is a dual-core Arm® Cortex®-M4F/M0+ PSoC™ 63 microcontroller with integrated Bluetooth® LE 5.0 radio, 1-MB flash, 288-KB SRAM, and programmable analog/digital peripherals. It operates from 1.7 V to 3.6 V, delivers up to 4 dBm TX power, –95 dBm RX sensitivity, and supports simultaneous BLE connections in master/slave modes - deployed in battery-powered IoT edge nodes requiring secure wireless sensor aggregation.

For engineers reviewing the CY8C6347FMI-BUD53T datasheet, CY8C6347FMI-BUD53T pinout, CY8C6347FMI-BUD53T application, or CY8C6347FMI-BUD53T equivalent, key selection criteria include dual-CPU power efficiency (22 µA/MHz @ 0.9 V on M4), BLE link-layer concurrency (4 connections), QSPI XIP with hardware encryption, CAPSENSE™ liquid-tolerant touch, and ROM-based Secure Boot for firmware integrity validation.

Technical Context

This device implements a tightly coupled dual-CPU subsystem where the Cortex-M4F handles real-time signal processing and protocol stacks while the Cortex-M0+ manages BLE link-layer operations and low-power state coordination. The integrated 2.4-GHz RF transceiver includes a digital PHY, hardware-accelerated AES/SHA/TRNG crypto engine, and dedicated link-layer engine supporting BLE 5.0 features including 2 Mbps PHY and extended advertising.

Power management leverages six configurable modes, a SIMO buck converter (<1 µA quiescent), and backup domain with RTC + 64-byte memory. Clocking combines an 8-MHz IMO (±2%), 32-kHz ILO, external crystal support (16–35 MHz), FLL, PLL, and fractional dividers to feed CPU, BLE, and peripheral domains independently.

Key Specifications

Pinout & Package

Package: 104-ball Wafer-Level Chip-Scale Package (WLCSP), 0.4-mm pitch, 4.2 mm × 4.2 mm footprint, RoHS-compliant, thermal pad exposed on bottom.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core BLE MCU applications.

Compared with nRF52840-QIAA and DA1469x, CY8C6347FMI-BUD53T uniquely integrates dual-core deterministic scheduling, hardware crypto for full TLS offload, programmable analog/digital blocks for sensor conditioning and UI logic, and CAPSENSE™ with liquid tolerance - making it optimal for secure, sensor-rich, human-interface IoT endpoints.

Availability

CY8C6347FMI-BUD53T is available at Aetrix Electronics and suitable for smart wearables, BLE mesh lighting nodes, secure industrial remote monitors, and capacitive control panels requiring stable component supply across design-in, prototyping, and volume production phases.

Supply support for CY8C6347FMI-BUD53T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, automotive MCUs, security ICs, and industrial sensors - with over 30 years of embedded systems expertise and ISO 9001/TS 16949 certified manufacturing.

This part belongs to the PSoC™ 63 product line, designed specifically for secure, ultra-low-power IoT endpoints that require integrated wireless connectivity, programmable hardware resources, and robust firmware protection - not general-purpose computing or high-throughput data processing.

FAQ

What is the maximum operating frequency of the Cortex-M4F core in CY8C6347FMI-BUD53T?

The Cortex-M4F core operates at up to 150 MHz, confirmed in the official Infineon datasheet (002-18787 Rev. *R, Section 3.1.1). This frequency is achievable when powered at 1.1 V core voltage and using the PLL clock source. At 0.9 V core, the maximum frequency is reduced to maintain timing closure and power efficiency.

Does CY8C6347FMI-BUD53T support external QSPI flash with execute-in-place (XIP) capability?

Yes, it supports XIP via the Serial Memory Interface (SMIF) block, which enables direct code execution from external quad SPI flash. The SMIF includes a 4-KB cache and hardware AES-128 decryption for secure XIP - both features are documented in Section 3.6.4 of the datasheet and validated in ModusToolbox™ examples.

Can the BLE subsystem operate independently while the Cortex-M4F is in Deep Sleep mode?

Yes - the Cortex-M0+ core and BLE subsystem can remain active in Deep Sleep mode while the M4F is powered down. The M0+ handles BLE advertising, scanning, and connection events autonomously, waking the M4F only upon application-defined triggers (e.g., received packet or timer expiry), as specified in Section 3.2.2 and 3.3 of the datasheet.

Is CAPSENSE™ on CY8C6347FMI-BUD53T capable of reliable operation in the presence of water or condensation?

Yes - CAPSENSE™ uses mutual capacitance scanning and SmartSense auto-tuning to maintain >80:1 signal-to-noise ratio under wet conditions. The hardware supports shield-driven and guard-ring techniques, and the TRM (Section 3.8.2) confirms liquid tolerance validated per IEC 61000-4-6 and IPC-J-STD-001 standards.