Infineon Technologies CY8C6347LQI-BLD52

Overview

CY8C6347LQI-BLD52 from Infineon is a dual-core Arm® Cortex®-M4F/M0+ microcontroller with integrated Bluetooth® 5.0 radio, 1-MB flash, 288-KB SRAM, and programmable analog/digital peripherals. It operates at up to 150 MHz (M4) and 100 MHz (M0+), supports 1.7–3.6 V supply, and delivers –95 dBm RX sensitivity and 4 dBm TX power for secure IoT edge node applications.

For engineers reviewing the CY8C6347LQI-BLD52 datasheet, CY8C6347LQI-BLD52 pinout, CY8C6347LQI-BLD52 application, or CY8C6347LQI-BLD52 equivalent, key selection criteria include dual-CPU power efficiency (22 µA/MHz @ 0.9 V on M4), BLE 5.0 link-layer concurrency (4 connections), QSPI XIP with hardware encryption, CAPSENSE™ liquid-tolerant touch, and SIMO buck converter quiescent current <1 µA.

Technical Context

The device implements a tightly coupled dual-CPU subsystem where the Cortex-M4F handles real-time signal processing and security-critical tasks while the Cortex-M0+ manages BLE protocol stack and low-power background operations via IPC and shared memory. Both cores operate independently with separate caches, DMA controllers (16 channels each), and configurable voltage domains (0.9 V or 1.1 V).

Its Bluetooth® LE subsystem integrates a 2.4-GHz RF transceiver, digital PHY, and hardware-accelerated Link Layer engine supporting master/slave roles, 2 Mbps data rate, and simultaneous four-connection management - all with dedicated 5.7 mA TX (0 dBm) and 6.7 mA RX (2 Mbps) current profiles at 3.3 V.

Key Specifications

Pinout & Package

CY8C6347LQI-BLD52 is housed in a 124-ball BGA package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per the official Infineon pinout diagram for CY8C6347LQI-BLD52 (Rev. *R, page 32), supporting USB, QSPI, BLE antenna interface, and dual-voltage I/O banks (1.8 V / 3.3 V).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core BLE MCU applications.

Compared with Nordic nRF52840 and Dialog DA1469x, CY8C6347LQI-BLD52 uniquely combines dual-CPU deterministic partitioning, integrated high-SNR analog (ADC/DAC/comparators), and hardware-accelerated CAPSENSE™ - reducing BOM count and firmware complexity in sensor-rich BLE edge nodes.

Availability

CY8C6347LQI-BLD52 is available at Aetrix Electronics and suitable for smart wearables, industrial sensor nodes, secure access badges, and wireless human-machine interfaces requiring stable component supply across multi-year production cycles.

Supply support for CY8C6347LQI-BLD52 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, automotive MCUs, and secure connectivity solutions, with annual R&D investment exceeding €1.4 billion.

CY8C6347LQI-BLD52 belongs to the PSoC™ 63 product line - designed specifically for secure, ultra-low-power IoT endpoints requiring integrated BLE 5.0, programmable analog, and hardware-enforced trust anchors.

FAQ

What is the maximum operating frequency of each CPU core in CY8C6347LQI-BLD52?

The Arm Cortex-M4F core operates at up to 150 MHz with single-cycle multiply, floating-point unit, and memory protection; the Cortex-M0+ core runs at up to 100 MHz with identical MPU support. Both cores support dynamic voltage scaling between 0.9 V and 1.1 V, directly affecting achievable clock speed and active current draw per datasheet Section 3.1.1.

Does CY8C6347LQI-BLD52 support external flash execution with encryption?

Yes - its Serial Memory Interface (SMIF) supports Execute-In-Place (XIP) from external quad SPI flash with on-the-fly AES-128 decryption. A dedicated 4-KB cache optimizes instruction fetch bandwidth, and hardware key storage prevents plaintext exposure during boot or runtime code execution.

How many simultaneous BLE connections does the onboard radio support?

The integrated Bluetooth 5.0 Link Layer engine supports up to four concurrent connections - two as master and two as slave - with full hardware acceleration for advertising, scanning, and connection management. This is confirmed in Section 3.3 of the datasheet and validated in ModusToolbox™ BLE middleware examples.

Is CAPSENSE™ on CY8C6347LQI-BLD52 capable of detecting touch through water or wet surfaces?

Yes - CAPSENSE™ implements adaptive baseline tracking and shield-driven mutual capacitance sensing, achieving >100:1 signal-to-noise ratio and certified liquid tolerance per IEC 61000-4-6. SmartSense auto-tuning eliminates manual calibration, enabling reliable touch detection on wet glass or plastic enclosures without firmware modification.