Infineon Technologies CY95F564KNPF-G-UNERE2

Overview

CY95F564KNPF-G-UNERE2 from Infineon Technologies (formerly Cypress) is an 8-bit Flash microcontroller in the MB95560H series, featuring the F2MC-8FX CPU core, 20 KB on-chip Flash, 496 bytes RAM, LIN-UART interface, and dual-bank Flash for concurrent read/erase operations. It supports up to 16.25 MHz machine clock, 8/10-bit A/D conversion across 6 channels, and four low-power standby modes - used in automotive body control modules requiring LIN communication and deterministic real-time response.

For engineers reviewing the CY95F564KNPF-G-UNERE2 datasheet, CY95F564KNPF-G-UNERE2 pinout, CY95F564KNPF-G-UNERE2 application, or CY95F564KNPF-G-UNERE2 equivalent, key selection criteria include LIN master/slave capability, 20 KB Flash with security lock, sub-CR clock support for watchdog timing, and 17-pin I/O configuration with two N-ch open-drain outputs for direct LED/load driving.

Technical Context

The device implements the F2MC-8FX CPU core with 136 basic instructions, 1–3 byte instruction length, and 16-bit arithmetic support - enabling efficient control-loop execution in resource-constrained embedded systems. Its clock system integrates main oscillation (up to 16.25 MHz), external clock input (32.5 MHz), and programmable main CR clock (4–16 MHz via PLL multiplication), all supervised by a dedicated clock supervisor counter.

Peripheral integration includes two 8/16-bit composite timers (configurable as dual 8-bit or single 16-bit), full-duplex LIN-UART with double-buffering and asynchronous/synchronous serial modes, six external interrupt channels with edge-selectable wake-up, and an 8/10-bit ADC with selectable resolution per channel - all mapped to a 20-pin SOJ package with verified pin assignment.

Key Specifications

Pinout & Package

Package: 20-pin Small Outline J-Leaded (SOJ020), 300 mil width, JEDEC MS-026AC compliant, lead-free and RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit LIN microcontroller applications.

Compared with SPC560B50L3 and RL78/F12, CY95F564KNPF-G-UNERE2 offers optimal balance of LIN functionality, 20 KB Flash capacity, and SOJ-20 footprint - making it suitable for cost-sensitive, space-constrained automotive subnodes where 8-bit performance suffices and legacy toolchain continuity matters.

Availability

CY95F564KNPF-G-UNERE2 is available at Aetrix Electronics and suitable for automotive body electronics, smart lighting systems, and industrial LIN sensor networks requiring stable component supply, long-term lifecycle support, and qualified automotive-grade sourcing.

Supply support for CY95F564KNPF-G-UNERE2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive microcontrollers, and security solutions - with global R&D, wafer fabrication, and automotive qualification infrastructure.

This part belongs to the MB95560H series - a family of 8-bit Flash MCUs designed specifically for cost-optimized, LIN-based automotive body electronics where deterministic timing, low-voltage operation, and functional safety features like clock supervision are essential.

FAQ

What is the maximum machine clock frequency supported by CY95F564KNPF-G-UNERE2?

The device supports a maximum machine clock frequency of 16.25 MHz, achievable when using an external clock input up to 32.5 MHz with internal division-by-2. At this rate, minimum instruction execution time is 61.5 ns, and interrupt processing time is 0.6 µs - verified in the official datasheet (Document Number 002-04629 Rev. *E, page 3).

Does CY95F564KNPF-G-UNERE2 include a built-in low-voltage detection (LVD) reset circuit?

Yes - the "K" suffix in CY95F564KNPF-G-UNERE2 indicates inclusion of the low-voltage detection reset circuit, which triggers reset when VDD drops below a user-selectable threshold (typically 2.7 V or 3.0 V). This feature is absent in "H"-suffix variants and is documented in the MB95560H Series product lineup table (page 3).

Can the LIN-UART operate in both master and slave modes simultaneously?

No - the LIN-UART supports either master or slave mode per runtime configuration, not concurrent operation. Mode selection is controlled via dedicated register bits (LINCR0.LMSEL), and switching requires reinitialization. The datasheet confirms LIN master/slave capability but specifies exclusive mode selection (page 1, Features section).

What is the endurance rating and data retention period for the on-chip Flash memory?

The Flash memory is rated for 10,000 program/erase cycles and guarantees 10 years of data retention at 85°C - specific to the "K" variant (CY95F564K) as stated in the MB95560H Series product lineup table (page 4). This differs from "H" variants, which offer 100,000 cycles and 5-year retention.