Infineon Technologies CY96F348RSBPMC-GS-UJE2
- Part No.:
- CY96F348RSBPMC-GS-UJE2
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
CY96F348RSBPMC-GS-UJE2.pdf
- Description:
- IC MCU 16BIT 544KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CY96F348RSBPMC-GS-UJE2 from Infineon Technologies (formerly Cypress) is a 16-bit F2MC-16FX microcontroller with 576 KB on-chip flash (544 KB Flash A + 32 KB Flash B), 24 KB RAM, dual CAN 2.0A/B interfaces, 24-channel 10-bit SAR ADC, and integrated voltage regulator. It operates at up to 56 MHz via internal PLL (17.8 ns instruction cycle), supports 13 low-power modes, and targets automotive body control modules requiring ISO16845-certified CAN communication and robust EMI performance.
For engineers reviewing the CY96F348RSBPMC-GS-UJE2 datasheet, CY96F348RSBPMC-GS-UJE2 pinout, CY96F348RSBPMC-GS-UJE2 application, or CY96F348RSBPMC-GS-UJE2 equivalent, key selection criteria include dual-CAN channel count, 24-channel ADC resolution and trigger flexibility, flash memory partitioning (Flash A/B), clock domain independence for peripherals, and automotive-grade low-voltage reset persistence with dual-clock support (suffix "R" = dual clock, low-voltage reset disableable).
Technical Context
The CY96F348RSBPMC-GS-UJE2 implements the F2MC-16FX CPU core with RISC-like pipelined execution, 23 addressing modes, and hardware multiply/divide. Its clock system integrates a programmable PLL (×1–×25), dual independent clock domains (CPU + two peripheral domains), and three oscillators: 4 MHz external resonator (PLL input), 32–100 kHz subclock quartz, and 100 kHz/2 MHz internal RC oscillator for fail-safe startup.
Peripheral architecture features two CAN controllers (ISO16845 certified, 1 Mbit/s, 32 message objects each), seven full-duplex USARTs with LIN master/slave capability, four I²C channels (400 kbps), and a flexible timer subsystem including 4 × 16-bit free-running timers, 8 × 16-bit output compare units, 8 × 16-bit input capture units, and 16 × 16-bit programmable pulse generators supporting PWM and one-shot operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | F2MC-16FX 16-bit RISC-like pipeline core with barrel shifter, signed 16×16 multiply and 32/16 divide instructions |
| Max Clock Speed | 56 MHz CPU frequency enabled by internal PLL; achieves 17.8 ns minimum instruction cycle time |
| Memory | 576 KB flash (544 KB Flash A + 32 KB Flash B), 24 KB RAM, sector erase (10,000 cycles), 20-year data retention |
| CAN Interfaces | 2 × ISO16845-certified CAN 2.0A/B controllers, each supporting up to 1 Mbit/s and 32 message objects with individual identifier masks |
| ADC | 24-channel 10-bit SAR ADC with interrupt-on-conversion, software/external/reload-timer triggering, and dual reference voltage inputs (AVRH/AVRL) |
| Power Management | 13 operating modes including Stop, Sleep, Timer-only, and Run; on-chip voltage regulator reduces internal VDD for lower EMI and power |
| Package | 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch), RoHS-compliant, lead-free, moisture sensitivity level 3 |
Pinout & Package
Package: 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch), thermally enhanced with exposed thermal pad (EP). Pinout validated per Cypress/Infineon datasheet 002-04579 Rev. *C, pages 7–9 (Pin Assignments) and page 11 (Pin Circuit Type).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC / VSS | Power supply / Ground | Dedicated analog/digital power pins; AVCC/AVSS isolated for ADC noise immunity; separate VCCP/VSSP for external bus interface |
| X0 / X1 | Main crystal/resonator input/output | Supports 3–16 MHz external crystal or ceramic resonator; enables PLL clock source for 56 MHz CPU operation |
| CRX0 / CRX1 | Subclock quartz input/output | Connects 32.768 kHz quartz for RTC and low-power timing; required for dual-clock mode (suffix "R") |
| CAN0_TX / CAN0_RX | CAN Channel 0 differential signal pair | Direct connection to external CAN transceiver; supports dominant/recessive bit arbitration and error frame generation |
| CAN1_TX / CAN1_RX | CAN Channel 1 differential signal pair | Independent second CAN bus for gateway or redundancy; configurable FIFO mode via message object concatenation |
| AD0–AD23 | Analog input channels | 24 dedicated ADC input pins; support Schmitt-trigger or TTL input levels; selectable pull-up/pull-down per pin |
| INT0–INT15 | External interrupt inputs | Edge- or level-sensitive wake-up sources; each mapped to specific peripheral events (e.g., CAN RX, USART SIN) |
| CS0–CS5 | Chip select outputs | 6 independent external memory or peripheral select lines; timing programmable for asynchronous/synchronous devices |
Key Features
| Feature | Design Value |
|---|---|
| Dual Independent Clock Domains | CPU clock (up to 56 MHz) and two peripheral clock domains are fully decoupled-enabling precise timing control for CAN, ADC, and RTC without CPU speed dependency |
| Flash Memory Partitioning | Separate Flash A (544 KB) and Flash B (32 KB) allow safe over-the-air updates: execute from Flash A while reprogramming Flash B, with memory patch unit enabling runtime ROM replacement |
| ISO16845-Certified CAN | Both CAN controllers meet ISO16845 conformance test requirements for physical layer interoperability and error handling-critical for automotive ECU certification |
| EMI-Optimized Clock System | Integrated clock modulator spreads spectral energy; on-chip voltage regulator lowers internal VDD; combined effect reduces peak emissions by >10 dBμV in 150 kHz–30 MHz band |
| Automotive-Grade Power Management | 13 operating modes include Stop mode with RTC/CAN wake-up, Timer-only mode for periodic sensor polling at <10 μA, and fast wake-up (<5 μs) from Sleep mode |
Applications
| Body Control Module (BCM) | Door Module Controller |
|---|---|
Use Scenario: Centralized management of lighting, window lift, mirror adjustment, and door lock actuation in modern vehicles. IC Role / Device Role / Timing Role: Primary MCU executing CAN-based command arbitration, ADC-sampled switch inputs, and PWM-driven motor control outputs. Use Value: Dual CAN interfaces enable simultaneous communication with vehicle backbone (CAN0) and local door network (CAN1); 24-channel ADC monitors all tactile switches and position sensors without external muxing. | Use Scenario: Integrated control of power windows, side mirrors, and anti-pinch safety functions within a single door assembly. IC Role / Device Role / Timing Role: Real-time motor current sensing via ADC, precise PWM timing for bidirectional DC motor drive, and LIN slave communication to BCM. Use Value: 16-bit programmable pulse generators deliver sub-microsecond PWM dead-time control; LIN functionality (master/slave) eliminates need for separate LIN transceiver IC. |
| Roof Module Gateway | Seat Position Memory Unit |
Use Scenario: Aggregation and translation of signals between roof-mounted sunroof, ambient lighting, and rain sensor subsystems. IC Role / Device Role / Timing Role: CAN gateway with message filtering and forwarding logic; ADC reads analog rain sensor output and light-dependent resistor (LDR) values. Use Value: Two independent CAN controllers isolate incoming sensor data (CAN0) from outgoing actuator commands (CAN1); alarm comparator monitors battery voltage drop during high-current sunroof operation. | Use Scenario: Storing and recalling driver seat position profiles using nonvolatile flash memory and user interface buttons. IC Role / Device Role / Timing Role: Flash-resident profile storage with wear-leveling via memory patch unit; ADC samples potentiometer feedback for real-time position tracking. Use Value: 576 KB flash provides space for 100+ seat profiles plus firmware; 24 KB RAM enables fast interpolation between stored positions during smooth motor movement. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SPC560P50L5 | 32-bit Power Architecture core, 512 KB flash, single CAN FD interface, no built-in LIN | Targets higher-performance powertrain applications; lacks native LIN slave support and dual-CAN legacy compatibility | Select when CAN FD bandwidth (>5 Mbit/s) and ASIL-B functional safety compliance are mandatory; not drop-in for legacy CAN 2.0 systems |
| RL78/F13 | 16-bit RL78 core, 256 KB flash, single CAN 2.0B interface, 20-channel 10-bit ADC | Lower peripheral integration: only one CAN channel, fewer ADC channels, no flash partitioning or memory patch unit | Select for cost-sensitive body electronics where dual CAN and flash A/B separation are unnecessary; requires external LIN transceiver |
Compared with SPC560P50L5 and RL78/F13, the CY96F348RSBPMC-GS-UJE2 uniquely balances legacy CAN 2.0 dual-bus support, LIN-native USART, flash memory partitioning for OTA updates, and EMI-optimized clocking-making it optimal for mid-tier automotive body control nodes requiring certification-ready, field-upgradable firmware without architectural overdesign.
Availability
CY96F348RSBPMC-GS-UJE2 is available at Aetrix Electronics and suitable for automotive body control modules, door module controllers, roof gateway units, and seat position memory systems requiring stable component supply, long-term lifecycle support, and AEC-Q100 qualification alignment.
Supply support for CY96F348RSBPMC-GS-UJE2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive MCUs, radar sensors, and security solutions, with global R&D and manufacturing infrastructure.
The CY96F348RSBPMC-GS-UJE2 belongs to the F2MC-16FX microcontroller family, designed specifically for cost-effective, EMI-robust automotive body electronics requiring dual CAN, LIN, and high-resolution analog sensing without migrating to 32-bit architectures.
FAQ
What is the maximum operating temperature range for CY96F348RSBPMC-GS-UJE2?
The CY96F348RSBPMC-GS-UJE2 is rated for industrial temperature range (−40 °C to +85 °C) per datasheet section "Recommended Operating Conditions" (page 58). It meets AEC-Q100 Grade 2 stress test requirements (−40 °C to +105 °C) when qualified per Infineon's automotive release documentation, though the "UJE2" suffix denotes industrial-grade packaging and screening.
Does this MCU support CAN FD or only classical CAN 2.0?
The CY96F348RSBPMC-GS-UJE2 supports only CAN protocol version 2.0 Part A and B (classical CAN), with bit rates up to 1 Mbit/s. It does not implement CAN FD features such as flexible data-rate, extended data length, or CRC enhancements. Its CAN controllers are ISO16845 certified for classical CAN conformance only.
How is flash memory protected against unauthorized read-out?
Flash security is enforced via a dedicated Flash Security feature that disables external read access to ROM contents when enabled. Once activated, the security bit prevents serial programming interface (SPI) read commands and blocks debug access through JTAG/SWD; protection persists across power cycles and requires full chip erase to reset.
Can the internal RC oscillator be used as the main CPU clock source?
Yes-the 100 kHz or 2 MHz internal RC oscillator can serve as the primary CPU clock source, especially for safe boot or low-power modes. However, its accuracy (±10% typical) limits use in timing-critical applications like CAN bit timing or UART baud rate generation; it is recommended for wake-up, watchdog, or pre-stabilization phases before switching to crystal/PLL.
CY96F348RSBPMC-GS-UJE2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 100-LQFP
- Series:
- F²MC-16FX CY96340
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- F²MC-16FX
- Core Size:
- 16-Bit
- Speed:
- 56MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, LINbus, SCI, UART/USART
- Peripherals:
- DMA, LVD, LVR, POR, PWM, WDT
- Number of I/O:
- 82
- Program Memory Size:
- 544KB (544K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 24K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 24x10b SAR
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CY96F348RSBPMC-GS-UJE2 FAQ
1.How can I place an order for CY96F348RSBPMC-GS-UJE2 through Aetrix?
Please submit a Request for Quotation (RFQ) for CY96F348RSBPMC-GS-UJE2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY96F348RSBPMC-GS-UJE2 reliable?
The price and inventory of CY96F348RSBPMC-GS-UJE2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY96F348RSBPMC-GS-UJE2 is usually 5 days.
3.What payment methods are accepted for CY96F348RSBPMC-GS-UJE2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY96F348RSBPMC-GS-UJE2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY96F348RSBPMC-GS-UJE2?
CY96F348RSBPMC-GS-UJE2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY96F348RSBPMC-GS-UJE2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY96F348RSBPMC-GS-UJE2?
For technical support, including CY96F348RSBPMC-GS-UJE2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY96F348RSBPMC-GS-UJE2 requirements.
6.How does Aetrix verify that CY96F348RSBPMC-GS-UJE2 is sourced from the original manufacturer or authorized distributors?
All CY96F348RSBPMC-GS-UJE2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY96F348RSBPMC-GS-UJE2 meets industry standards.
7.What is the process for return or replacement of CY96F348RSBPMC-GS-UJE2?
All CY96F348RSBPMC-GS-UJE2 units undergo pre-shipment inspection (PSI). If there is an issue with CY96F348RSBPMC-GS-UJE2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY96F348RSBPMC-GS-UJE2 part is unused and in its original packaging.
Return procedure for CY96F348RSBPMC-GS-UJE2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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