Infineon Technologies CY96F387RSAPMC-GS-UJE2

Overview

CY96F387RSAPMC-GS-UJE2 from Cypress Semiconductor is a 16-bit F2MC-16FX microcontroller featuring 576 KB Flash (544 KB + 32 KB dual-bank), 28 KB RAM, 5 CAN channels, 40-channel 10-bit SAR ADC, and integrated stepper motor controller with six high-current outputs. It operates up to 56 MHz via internal PLL (17.8 ns instruction cycle), supports dual-clock domain (main/sub/RC), and targets automotive body control, industrial motion systems, and smart appliance HMI.

For engineers reviewing the CY96F387RSAPMC-GS-UJE2 datasheet, CY96F387RSAPMC-GS-UJE2 pinout, CY96F387RSAPMC-GS-UJE2 application, or CY96F387RSAPMC-GS-UJE2 equivalent, key selection criteria include dual-clock reset configuration (suffix "RS"), LQFP-120 package compatibility, CAN 2.0A/B compliance at 1 Mbit/s, flash security features, and real-time clock calibration support.

Technical Context

The CY96F387RSAPMC-GS-UJE2 implements Cypress's F2MC-16FX CPU core with 23 addressing modes, barrel shift, signed multiply/divide, and an 8-byte instruction queue. Its clock tree enables independent CPU (up to 56 MHz) and peripheral domain frequency selection using main oscillator (3–16 MHz), subclock (32–100 kHz), or 100 kHz/2 MHz RC oscillator.

It integrates five ISO16845-certified CAN controllers with 32 message objects per channel, programmable FIFO mode, time-triggered disable for automatic retransmission, and loop-back self-test. The on-chip voltage regulator reduces internal CPU voltage to minimize EMI and power consumption across 13 low-power operating modes.

Key Specifications

Pinout & Package

Package: 120-pin LQFP (LQM120), RoHS-compliant, surface-mount, 14 mm × 14 mm body size, 0.4 mm lead pitch.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit automotive-grade microcontroller applications.

Compared with MB9B310R and RL78/F13, the CY96F387RSAPMC-GS-UJE2 delivers unique integration of five CAN interfaces, dual-bank Flash for fail-safe updates, and six-channel stepper control - reducing system-level component count and PCB area in motion-centric automotive and industrial designs.

Availability

CY96F387RSAPMC-GS-UJE2 is available at Aetrix Electronics and suitable for automotive body control modules, industrial stepper drives, smart appliance HMIs, and energy metering gateways requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for CY96F387RSAPMC-GS-UJE2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) designs high-performance, mixed-signal ICs for automotive, industrial, and consumer applications with emphasis on reliability, integration, and system-level optimization.

The CY96F387RSAPMC-GS-UJE2 belongs to the CY96380 series - a family of 16-bit F2MC-16FX microcontrollers engineered for deterministic real-time control in electrically noisy environments such as vehicle chassis systems and factory automation equipment.

FAQ

What does the "RS" suffix indicate in CY96F387RSAPMC-GS-UJE2?

The "RS" suffix denotes a specific configuration: persistent low-voltage reset (LVR) functionality and single-clock domain operation. This means the device asserts reset whenever VCC drops below the threshold and does not support independent subclock operation - simplifying power management in cost-sensitive automotive modules where dual-clock complexity is unnecessary.

Does CY96F387RSAPMC-GS-UJE2 support CAN FD or only classical CAN?

This device supports only Classical CAN per ISO 11898-1:2015 (CAN 2.0A/B), with bit rates up to 1 Mbit/s and full ISO16845 conformance testing. It does not implement CAN FD features such as flexible data-rate, extended data length, or CRC enhancements - those require newer architectures like Infineon's AURIX or Cypress's later Traveo families.

How is flash security implemented on CY96F387RSAPMC-GS-UJE2?

Flash security uses hardware-enforced lock bits that disable external read access to Flash A and Flash B contents via JTAG or serial programming interfaces. Once enabled, protected regions cannot be read or erased without full chip erase - preventing firmware reverse engineering while allowing verified firmware updates through authenticated bootloader routines.

Can the on-chip LCD controller drive segment-based displays larger than 4×65?

No - the integrated LCD controller is fixed at 4 COM lines and up to 65 SEG lines (260 segments maximum). Driving larger panels requires external LCD drivers or multiplexing logic. However, all SEG/COM pins can be reassigned as general-purpose I/O when LCD is disabled, preserving flexibility for non-display applications.