Infineon Technologies CYB06447BZI-D54
- Part No.:
- CYB06447BZI-D54
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 124-VFBGA
- Datasheet:
-
CYB06447BZI-D54.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 124VFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:1,896
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Product details
Overview
CYB06447BZI-D54 from Infineon is a PSoC™ 64 "Secure Boot" MCU featuring dual Arm® Cortex®-M4F (150 MHz) and Cortex®-M0+ (100 MHz) CPUs, 832-KB flash, 176-KB SRAM, hardware-based Root-of-Trust, and immutable secure boot with ECC signature validation - deployed in IoT edge nodes requiring TLS authentication, secured firmware updates, and attested device identity.
For engineers reviewing the CYB06447BZI-D54 datasheet, CYB06447BZI-D54 pinout, CYB06447BZI-D54 application, or CYB06447BZI-D54 equivalent, this part delivers verified secure boot chain handover, on-chip SIMO DC-DC converter (<1 µA quiescent), QSPI XIP with on-the-fly encryption, CAPSENSE™ for liquid-tolerant touch, and Deep Sleep operation at 7 µA with 64-KB SRAM retention.
Technical Context
The CYB06447BZI-D54 implements a hardened security architecture where the M0+ core executes only immutable ROM boot code and supervisory firmware, isolating the M4F application core from boot integrity checks and provisioning services. Its hardware RoT enforces firmware image hash verification using Infineon's public key before execution.
It integrates a programmable analog subsystem (12-bit SAR ADC, two opamps, 12-bit DAC), twelve UDBs for Verilog or drag-and-drop logic, nine SCBs (eight configurable as SPI/I²C/UART), USB full-speed interface, and QSPI SMIF supporting octal mode up to 640 Mbps with 4-KB cache and XIP encryption.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 150-MHz Cortex-M4F + 100-MHz Cortex-M0+, with separate MPUs and voltage scaling (0.9 V / 1.1 V) |
| Memory | 832-KB application flash + 32-KB AUXflash + 32-KB SFlash; 176-KB SRAM with selective retention control |
| Security | Hardware RoT with immutable boot ROM, ECC-based image signature validation, unique device ID & secret key generation during provisioning |
| Low-Power Modes | Six modes; Deep Sleep current = 7 µA with 64-KB SRAM retention; SIMO DC-DC quiescent current <1 µA |
| QSPI/SMIF | Supports XIP with on-the-fly AES decryption, 4-KB cache, octal interface up to 640 Mbps |
| Analog Peripherals | 12-bit 1-Msps SAR ADC (16-channel sequencer, averaging), two low-power comparators, 12-bit DAC (<2 µs settling), two opamps |
| Package | 124-ball BGA (8 mm × 8 mm, 0.5 mm pitch), RoHS-compliant, lead-free |
Pinout & Package
CYB06447BZI-D54 is housed in a 124-ball BGA package (8 mm × 8 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per the official Infineon pinout diagram (Document 002-26017 Rev. *K, Page 32), supporting dual-voltage I/O (1.7–3.6 V), six overvoltage-tolerant pins, and Smart I/O Boolean logic in Deep Sleep.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO0–VDDIO3 | I/O power supply rails | Independent 1.7–3.6 V domains enabling mixed-voltage interfacing and isolation |
| VDDD/VDDA | Digital/analog core supply | Core logic powered at 0.9 V or 1.1 V; analog subsystem referenced to VDDA for precision |
| SWDCLK/SWDIO | ARM Serial Wire Debug interface | Two-pin debug port supporting programming, secure policy enforcement, and JTAG ID access (0x2E4B0069) |
| QSPI0_[0:3] | Quad SPI data/control lines | Direct XIP-capable interface to external flash; supports encrypted read/write and octal mode timing |
| USB_DP/USB_DM | Full-speed USB differential pair | On-chip transceiver compliant with USB 2.0 FS; no external PHY required |
| XTAL_IN/XTAL_OUT | External crystal oscillator terminals | Supports 16–35 MHz crystals for high-accuracy clock source; optional 32-kHz crystal for RTC backup domain |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot Chain | Immutable ROM bootloader validates signed application images via ECC-256; enables OEM trust anchor establishment and attestation |
| Programmable Analog | 12-bit SAR ADC with hardware-averaged 16-channel sequencing and built-in temperature sensor - eliminates external sensing components |
| Smart I/O | Two 16-pin Smart I/O ports perform Boolean logic (AND/OR/XOR) in Deep Sleep - enables wake-on-pattern without CPU wake-up |
| QSPI Encryption Engine | On-the-fly AES-128 decryption during XIP fetch - secures firmware IP while maintaining zero-latency execution from external flash |
| CAPSENSE™ | Hardware-accelerated capacitive sensing with SmartSense auto-tuning, liquid tolerance, and proximity detection - certified for IEC 61000-4-6 immunity |
Applications
| Smart Home Hub | Industrial Sensor Node |
|---|---|
Use Scenario: Central controller aggregating BLE, Zigbee, and Matter-compliant end devices with local policy enforcement. IC Role / Device Role / Timing Role: Secure application host (M4F) + isolated RoT supervisor (M0+) managing TLS handshake, OTA update signing, and device attestation. Use Value: Eliminates need for external secure element; meets PSA Level 3 certification requirements with on-chip key generation and sealed storage. | Use Scenario: Battery-powered vibration/temperature monitor in predictive maintenance systems with 10-year deployment life. IC Role / Device Role / Timing Role: Ultra-low-power sensor fusion node executing RTOS tasks in Deep Sleep, waking only on TCPWM-triggered interrupt or Smart I/O pattern match. Use Value: 7 µA Deep Sleep with 64-KB SRAM retention extends battery life; on-chip SIMO DC-DC reduces system BOM count by one regulator. |
| Medical Wearable | Connected Building Controller |
Use Scenario: FDA-classified wearable collecting ECG, SpO₂, and motion data with HIPAA-compliant local encryption and audit logging. IC Role / Device Role / Timing Role: Cryptographic accelerator offloads AES-128, SHA-256, and TRNG operations from M4F; secure storage protects patient identifiers. Use Value: Hardware-accelerated crypto achieves <50 µs AES block encrypt time; OTP eFuse array stores root keys irreversibly. | Use Scenario: HVAC zone controller interfacing with BACnet MS/TP, Modbus RTU, and capacitive touch HMI in commercial buildings. IC Role / Device Role / Timing Role: Multi-protocol serial hub (nine SCBs) with CAPSENSE™ for bezel-free touch panel and programmable UDBs for custom protocol framing. Use Value: Eliminates discrete level shifters and protocol translators; UDB logic implements BACnet state machines without software overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562VE | Single-core Cortex-M33 with TrustZone; 512-KB flash, no dual-CPU isolation; lacks hardware RoT with device attestation | Supports basic secure boot but requires external secure element for PSA Level 3; no built-in provisioning service | Choose when cost sensitivity outweighs attestation requirements and external SE integration is acceptable |
| NXP LPC55S69 | Dual-core Cortex-M33 + M33; 640-KB flash; secure boot via EdgeLock SE050 companion chip; no integrated RoT or device secret generation | Relies on external secure element for key management; higher BOM cost and PCB area vs. single-die solution | Prefer when existing NXP ecosystem alignment or specific peripheral compatibility (e.g., FlexComm) drives selection |
Compared with STM32L562VE and LPC55S69, CYB06447BZI-D54 provides monolithic RoT with on-device attestation, eliminating external secure elements and reducing system-level certification effort - critical for cloud-connected IoT endpoints requiring zero-touch provisioning.
Availability
CYB06447BZI-D54 is available at Aetrix Electronics and suitable for smart home hubs, industrial sensor nodes, medical wearables, and connected building controllers requiring stable component supply, long-term lifecycle support, and secure firmware update capability.
Supply support for CYB06447BZI-D54 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor leader specializing in power management, automotive MCUs, and secure embedded solutions, with global manufacturing and R&D centers.
The PSoC™ 64 product line was designed specifically for cloud-connected IoT endpoints requiring out-of-box security, including immutable boot, device attestation, and TLS-ready execution environments - targeting certifications such as PSA Certified Level 3 and SESIP.
FAQ
What debug interfaces does CYB06447BZI-D54 support?
CYB06447BZI-D54 supports ARM Serial Wire Debug (SWD) via SWDCLK and SWDIO pins, with full access to both M4F and M0+ cores. It also exposes a 32-bit JTAG ID (0x2E4B0069) through the SWJ interface. Secure debug policies - including lock/unlock states and debug disable after provisioning - are enforced by the ROM bootloader and configurable in the Flash Boot image.
Does CYB06447BZI-D54 include factory-provisioned keys?
No - CYB06447BZI-D54 ships unprovisioned. During first boot, the device generates a unique device ID and cryptographically secure device secret key using its on-chip TRNG and RoT firmware. Provisioning occurs in-field or at manufacturing test using Infineon's Secure Boot SDK and CY8CPROTO-064S1-SB kit, with keys stored in protected SFlash and OTP eFuse.
Can the M0+ core be used for application code?
No - in CYB06447BZI-D54, the Cortex-M0+ core is reserved exclusively for secure system functions: ROM bootloader execution, RoT services, cryptographic acceleration offload, and debug policy enforcement. Application firmware runs solely on the Cortex-M4F core, which communicates with the M0+ via secure mailbox APIs defined in the PSoC™ 64 Trusted Firmware interface.
What is the maximum external QSPI flash size supported in XIP mode?
CYB06447BZI-D54 supports XIP from external QSPI flash up to 128 MB using 24-bit addressing. The SMIF controller handles automatic address translation and cache coherency for instruction fetches, with on-the-fly AES-128 decryption enabled per memory region. Octal mode timing allows sustained throughput of 640 Mbps, sufficient for real-time audio/video streaming from flash.
CYB06447BZI-D54 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 124-VFBGA
- Series:
- PSOC™ 6
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+, ARM® Cortex®-M4F
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 100MHz, 150MHz
- Connectivity:
- FIFO, I2C, IrDA, LINbus, Microwire, QSPI, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, CapSense, Crypto - AES, DMA, I2S, LCD, LVD, POR, PWM, RSA, SHA, Temp Sensor, TRNG, WDT
- Number of I/O:
- 100
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 288K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 16x10b SAR, 16x12b Sigma-Delta; D/A 2x7b, 1x8/12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CYB06447BZI-D54 FAQ
1.How can I place an order for CYB06447BZI-D54 through Aetrix?
Please submit a Request for Quotation (RFQ) for CYB06447BZI-D54 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CYB06447BZI-D54 reliable?
The price and inventory of CYB06447BZI-D54 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CYB06447BZI-D54 is usually 5 days.
3.What payment methods are accepted for CYB06447BZI-D54?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CYB06447BZI-D54 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CYB06447BZI-D54?
CYB06447BZI-D54 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CYB06447BZI-D54 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CYB06447BZI-D54?
For technical support, including CYB06447BZI-D54 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CYB06447BZI-D54 requirements.
6.How does Aetrix verify that CYB06447BZI-D54 is sourced from the original manufacturer or authorized distributors?
All CYB06447BZI-D54 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CYB06447BZI-D54 meets industry standards.
7.What is the process for return or replacement of CYB06447BZI-D54?
All CYB06447BZI-D54 units undergo pre-shipment inspection (PSI). If there is an issue with CYB06447BZI-D54, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CYB06447BZI-D54 part is unused and in its original packaging.
Return procedure for CYB06447BZI-D54:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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