Infineon Technologies CYPAP212A1-14SXI
- Part No.:
- CYPAP212A1-14SXI
- Manufacturer:
- Infineon Technologies
- Category:
- AC DC Converters, Offline Switches
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CYPAP212A1-14SXI.pdf
- Description:
- PRIMARY SIDE STARTUP CONTROLLER
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CYPAP212A1-14SXI from Infineon is a primary-side startup controller for secondary-controlled AC/DC flyback adapters, supporting universal input (85–265 VAC), 30 kHz free-running oscillator, and dual-mode operation (X-cap discharge or non-X-cap). It drives low-side FETs directly, interfaces with secondary controllers (PAG2S/PAG1S) via pulse-edge transformer (PET), and enables active clamp flyback (ACF) topology.
For engineers reviewing the CYPAP212A1-14SXI datasheet, CYPAP212A1-14SXI pinout, CYPAP212A1-14SXI application in USB PD adapters, or CYPAP212A1-14SXI equivalent for ACF/X-cap discharge designs, this page delivers verified functional roles, protection thresholds, timing parameters, and interface constraints critical to power adapter layout and fault response validation.
Technical Context
The device implements high-voltage start-up via internal JFET sourcing up to 1.5 mA from HV pin (500 V rated), followed by auxiliary winding biasing post-startup. It supports two operational modes: X-cap mode (HV connected to AC mains through diodes for capacitor discharge) and non-X-cap mode (HV tied to rectified DC bus).
Control logic synchronizes primary switching to secondary PWM pulses received at PULSEIN, while maintaining autonomous regulation during startup and fault recovery. Protection includes line UVP/OVP (via HV), SOVP (via OVP_AUX), pulse-by-pulse OCP (CSTH1), latch-off SCP (CSTH2), and VCC short protection limiting IHV_VCCSTG to 1.5 mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range | 85–265 VAC universal mains; enables global adapter compliance without manual voltage selection. |
| Oscillator frequency | 30 kHz typical (set by 50 kΩ RT resistor); defines base switching frequency during startup and open-loop operation. |
| Soft-start ramp max | 3.75 V (ISSCURR = 4.8 μA); controls duty cycle sweep from 1% to 70% over ~41.67 ms with 0.1 μF SS capacitor. |
| High-voltage pin rating | 500 V absolute maximum; allows direct connection to bridge rectifier output or AC line via diodes for X-cap discharge. |
| Current sense thresholds | CSTH1 (pulse-by-pulse OCP) and CSTH2 (latch-off SCP); enable fast primary-side fault detection without secondary feedback loop dependency. |
| VCC short protection | Limits HV-to-VCC current to ≤1.5 mA during VCC-to-GND short; prevents thermal runaway during board-level faults. |
Pinout & Package
Package: SOIC-14 (surface-mount, 150 mil width, JEDEC MS-012).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| HV | High-voltage start-up supply input | Accepts up to 500 V; powers IC during startup and enables X-cap discharge path when configured in X-cap mode. |
| GDH | High-side gate driver logic output | Drives external floating high-side driver IC (e.g., for ACF topology); not a direct FET driver. |
| PULSEIN | Pulse-edge transformer (PET) synchronization input | Receives isolated PWM edges from secondary controller (PAG2S/PAG1S); determines primary switching timing post-startup. |
| SS | Soft-start ramp capacitor terminal | Connects to external capacitor; linear ramp generated by 4.8 μA current source sets soft-start duration and max duty cycle (3.75 V). |
| RT | Timing resistor connection | 50 kΩ resistor sets 30 kHz oscillator frequency; defines free-running switching rate during startup and fault recovery. |
| GDL | Low-side gate driver output | Directly drives primary-side low-side MOSFET gate; logic-level compatible with standard N-channel FETs. |
| CS | Primary current sense input | Monitors RSENSE voltage; triggers OCP/SCP based on dual thresholds (CSTH1/CSTH2) independent of secondary control loop. |
| OVP_AUX | Auxiliary winding overvoltage detection | Monitors secondary-side reflected voltage via resistor divider; asserts SOVP only during startup or open-loop conditions. |
Key Features
| Feature | Design Value |
|---|---|
| X-cap discharge capability | Enables active discharge of EMI filter X-capacitors via HV pin in X-cap mode-eliminates need for passive bleed resistors and associated standby losses. |
| Dual-gate drive architecture | Simultaneous GDL (low-side) and GDH (logic-level high-side driver enable) outputs support ACF topologies with energy recycling, improving efficiency over conventional snubber-based flyback. |
| Isolation-synchronized control | PULSEIN input accepts PET-coupled PWM edges from secondary side, enabling precise timing alignment without optocoupler latency or bandwidth limitations. |
| Integrated VCC boost switch | Internal HV NFET (BSW/BGND pins) drives external inductor/diode to generate regulated VCC across wide output voltage ranges-removes need for external LDO. |
Applications
| USB-C Power Delivery Adapter | Active Clamp Flyback (ACF) Charger |
|---|---|
Use Scenario: Compact 30–65 W mobile phone/tablet adapter with programmable output (5–20 V) and <50 mW no-load consumption. IC Role / Device Role / Timing Role: Primary-side startup controller; initiates regulation, synchronizes to PAG2S PWM, and handles fault recovery while secondary manages closed-loop voltage/current. Use Value: Enables zero-voltage switching (ZVS) in ACF mode, reducing switching loss and EMI; X-cap discharge meets IEC 62368-1 touch-current safety requirements. | Use Scenario: High-efficiency laptop charger using active clamp to recycle leakage energy instead of dissipating it in snubber networks. IC Role / Device Role / Timing Role: Controls primary half-bridge in non-complementary state; GDH drives external high-side driver IC, GDL drives low-side FET, and PULSEIN aligns switching to secondary timing. Use Value: Achieves >94% peak efficiency by recovering leakage energy; eliminates snubber losses and reduces heatsink size vs. traditional QR flyback. |
| Universal Input AC/DC Adapter | Secondary-Controlled Flyback with X-cap Safety |
Use Scenario: Multi-output wall adapter (5 V/9 V/15 V/20 V) for multi-device charging, operating across 100–240 VAC mains with tight output regulation. IC Role / Device Role / Timing Role: Provides robust start-up under brownout (UVP) and surge (OVP) conditions; maintains regulation via auxiliary winding feedback during transient load steps. Use Value: Ensures reliable cold-start down to 85 VAC and shutdown above 265 VAC; SOVP via OVP_AUX prevents secondary overvoltage during open-loop faults. | Use Scenario: UL/EN 60950-1 and IEC 62368-1 certified power adapter requiring automatic X-cap discharge within 1 second after AC removal. IC Role / Device Role / Timing Role: HV pin serves as controlled discharge path; internal logic activates discharge current only in X-cap mode upon AC removal detection. Use Value: Replaces 2–3 discrete components (bleed resistor + relay/FET + driver) with single-pin function-reducing BOM count, PCB area, and failure points. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar primary-side startup controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CYPAP211A1-14SXI | Same SOIC-14 package and pinout; lacks X-cap discharge functionality and uses different OVP threshold (V_HV_OVRISE = 380 V vs. 420 V). | Restricted to non-X-cap designs; cannot replace CYPAP212A1-14SXI in safety-certified adapters requiring automatic X-cap discharge. | Select only when X-cap discharge is unnecessary and lower line OVP threshold is acceptable. |
| ICE5QSBG | Quasi-resonant flyback controller with integrated 650 V MOSFET; no PET synchronization or X-cap discharge; requires optocoupler feedback. | Targets cost-sensitive, fixed-output adapters without USB PD or ACF requirements; no secondary synchronization capability. | Choose for simpler QR flyback designs where secondary control and X-cap safety are not required. |
Compared with CYPAP211A1-14SXI, the CYPAP212A1-14SXI adds X-cap discharge and higher line OVP threshold-critical for safety certification. Versus ICE5QSBG, it enables secondary-controlled architectures with isolation-free timing and ACF efficiency gains, but requires companion secondary IC and PET transformer.
Availability
CYPAP212A1-14SXI is available at Aetrix Electronics and suitable for USB-C Power Delivery adapters, Active Clamp Flyback chargers, and universal-input AC/DC power supplies requiring stable component supply, long-term lifecycle support, and safety-critical X-cap discharge functionality.
Supply support for CYPAP212A1-14SXI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in high-voltage analog and mixed-signal solutions.
CYPAP212A1-14SXI belongs to the EZ-PD™ PAG2P product line, designed specifically for secondary-controlled AC/DC flyback adapters targeting USB Power Delivery and high-efficiency charging applications with integrated safety features.
FAQ
What is the purpose of the PULSEIN pin?
The PULSEIN pin receives isolated PWM edge signals from the secondary-side controller (e.g., PAG2S) via a pulse-edge transformer. It enables precise synchronization of primary-side switching to secondary timing, eliminating optocoupler latency and allowing full regulation handoff after startup. This pin is inactive during initial start-up and only engages once auxiliary winding biasing is established.
How does X-cap mode differ from non-X-cap mode in practice?
In X-cap mode, the HV pin connects directly to AC mains through diodes, enabling controlled discharge of EMI filter X-capacitors after AC removal-meeting IEC 62368-1 touch-current limits. In non-X-cap mode, HV connects to the rectified DC bus, providing start-up power and line UVP/OVP only. Mode selection is determined by external circuit configuration, not internal register settings.
Can CYPAP212A1-14SXI operate without a secondary controller?
No. CYPAP212A1-14SXI is designed exclusively for secondary-controlled flyback topologies and requires a companion secondary-side controller (PAG2S or PAG1S) for closed-loop regulation. It operates autonomously only during startup, soft-start, and fault recovery-primary switching is synchronized to PULSEIN pulses from the secondary side after initialization.
What protection features are implemented on the CS pin?
The CS pin implements dual-threshold overcurrent protection: CSTH1 triggers pulse-by-pulse current limiting during normal operation, while CSTH2 causes immediate latch-off for sustained overloads or short circuits. Both thresholds are internally fixed and do not require external programming; the CS input monitors voltage across a primary-side sense resistor and responds within one switching cycle.
CYPAP212A1-14SXI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- EZ-PD™
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Output Isolation:
- Isolated
- Internal Switch(s):
- No
- Voltage - Breakdown:
- 500V
- Topology:
- Flyback, Secondary Side SR
- Voltage - Start Up:
- -
- Voltage - Supply (Vcc/Vdd):
- 85V ~ 265V
- Duty Cycle:
- 70%
- Frequency - Switching:
- 30kHz
- Power (Watts):
- -
- Fault Protection:
- Current Limiting, Over Temperature, Over Voltage, Short Circuit, UVLO
- Control Features:
- Frequency Control, Soft Start
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- PG-DSO-14-800
- Mounting Type:
- Surface Mount
CYPAP212A1-14SXI FAQ
1.How can I place an order for CYPAP212A1-14SXI through Aetrix?
Please submit a Request for Quotation (RFQ) for CYPAP212A1-14SXI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CYPAP212A1-14SXI reliable?
The price and inventory of CYPAP212A1-14SXI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CYPAP212A1-14SXI is usually 5 days.
3.What payment methods are accepted for CYPAP212A1-14SXI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CYPAP212A1-14SXI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CYPAP212A1-14SXI?
CYPAP212A1-14SXI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CYPAP212A1-14SXI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CYPAP212A1-14SXI?
For technical support, including CYPAP212A1-14SXI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CYPAP212A1-14SXI requirements.
6.How does Aetrix verify that CYPAP212A1-14SXI is sourced from the original manufacturer or authorized distributors?
All CYPAP212A1-14SXI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CYPAP212A1-14SXI meets industry standards.
7.What is the process for return or replacement of CYPAP212A1-14SXI?
All CYPAP212A1-14SXI units undergo pre-shipment inspection (PSI). If there is an issue with CYPAP212A1-14SXI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CYPAP212A1-14SXI part is unused and in its original packaging.
Return procedure for CYPAP212A1-14SXI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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