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Infineon Technologies CYPD3184A1-24LQXQ
- Part No.:
- CYPD3184A1-24LQXQ
- Manufacturer:
- Infineon Technologies
- Category:
- AC DC Converters, Offline Switches
- Package:
- 24-UFQFN Exposed Pad
- Datasheet:
-
CYPD3184A1-24LQXQ.pdf
- Description:
- PAG1S
- Quantity:
- Payment:
- Shipping:
Inventory:4,900
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Product details
Overview
CYPD3184A1-24LQXQ from Infineon is a USB PD 3.0 PPS-compliant synchronous rectifier (SR) controller and charging port controller for secondary-side regulation in flyback AC-DC adapters. It integrates SR gate driving, CC/CV regulation, USB PD transceiver, legacy charging protocol support (QC4+, AFC, Apple), and VBUS load switch control in a single 24-QFN package with –40°C to +105°C operation.
For engineers reviewing the CYPD3184A1-24LQXQ datasheet, CYPD3184A1-24LQXQ pinout, CYPD3184A1-24LQXQ application, or CYPD3184A1-24LQXQ equivalent, key selection criteria include SR switching mode support (CrCM/valley), integrated LSCSA gain range (5–150), USB PD 3.0 PPS compliance, dual CC channel BMC PHY, and VBUS_IN voltage range (3.3–21.5 V).
Technical Context
EZ-PD™ PAG1S implements dual-loop secondary-side regulation: CV via FB/EА_OUT opto-coupled feedback and CC via LSCSA (CSP/CSN) with internal error amplifier. Its SR control uses fast negative-sense detection (≥–200 mV threshold) and zero-crossing detect (ZCD) on SR_SEN, supporting both CrCM and valley switching with SR_GDRV output driven to VDDD or 2×VDDD using external doubler capacitor (SR_CPP/SR_CPN).
The integrated USB PD transceiver handles half-duplex BMC communication on CC1/CC2 with built-in Rp termination switches and collision avoidance; DP_GPIO4/DM_GPIO5 provide BC1.2/QC/AFC/Apple charge detection without external components. VBUS_CTRL drives an external NFET load switch with gate clamped to VBUS_IN + 8 V, while VBUS_C monitors Type-C VBUS with configurable discharge path.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switching frequency | 20 kHz to 150 kHz - supports CrCM and valley switching modes for optimal efficiency across line/load |
| VBUS_IN range | 3.3 V to 21.5 V - powers internal HV regulator; outputs 5 V (5.5–21.5 V input) or VBUS_IN − 300 mV (3.3–5.5 V) |
| LSCSA gain range | 5 to 150 - enables accurate current sensing with 5 mΩ sense resistor for 1–3 A PPS constant-current regulation |
| SR_SEN voltage limit | ≤21.5 V - sets maximum drain-sense voltage; requires external resistor divider scaled per transformer turns ratio (e.g., 10 kΩ for 4:1) |
| USB PD compliance | PD 2.0, PD 3.0 with PPS - full BMC PHY, CC1/CC2 transceiver, and protocol engine for programmable power supply negotiation |
| Operating temperature | –40°C to +105°C - extended industrial grade rating suitable for compact, high-power-density USB PD adapter designs |
Pinout & Package
24-pin QFN (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad (EPAD). Package supports high-power dissipation in space-constrained USB PD adapter secondary-side layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SR_GDRV | Synchronous rectifier gate driver output | Drives external NFET gate to VDDD or 2×VDDD; enables low RDS(on) conduction during SR on-time |
| SR_SEN | SR FET drain voltage sense input | Detects negative voltage (≥–200 mV) and zero crossing for precise turn-on/turn-off timing in CrCM/valley modes |
| CC1 / CC2 | USB PD configuration channel interfaces | Integrated BMC transceiver with Rp switches; supports full PD 3.0 PPS negotiation and cable plug detection |
| VBUS_CTRL | Load switch NFET gate driver | Outputs VBUS_IN + 8 V (clamped) to drive external high-side NFET; enables controlled VBUS ramp-up/down |
| CSP / CSN | LSCSA differential inputs | Supports 5–150 gain for ±1% current sensing accuracy; used for CC regulation and SCP protection |
| FB / EA_OUT | CV regulation feedback loop interface | Internal 0.744 V reference; EA_OUT drives optocoupler for primary-side feedback; FB accepts resistive divider from VBUS_C |
Key Features
| Feature | Design Value |
|---|---|
| Integrated SR + PD + legacy charging | Single-chip solution replaces discrete SR controller, PD PHY, and QC/AFC/Apple/Battery Charging ICs in adapter BOM |
| Configurable protection suite | OVP/UVP/OCP/SCP/OTP all programmable via firmware; eliminates need for external protection ICs or discrete comparators |
| Dual-mode SR control | Automatic selection between CrCM and valley switching based on operating conditions; maintains >94% peak efficiency at 65 W |
| VBUS discharge paths | Independent discharge circuits for VBUS_IN and VBUS_C rails; ensures safe voltage decay during disconnect or fault events |
| GPIO flexibility | 6 GPIOs (3 dedicated + 3 multiplexed); DP/DM double as SWD debug pins or legacy charge detect lines-no external mux required |
Applications
| USB PD 3.0 PPS Adapter | Quick Charge 4.0+ Wall Charger |
|---|---|
Use Scenario: 45–65 W compact travel adapter delivering 3.3–21 V @ 3 A with 20 mV/step PPS adjustment. IC Role / Device Role / Timing Role: Secondary-side SR controller and PD protocol engine managing real-time V/I negotiation, SR timing, and load switch sequencing. Use Value: Enables <100 mV load regulation error and <±3% current accuracy over full PPS range without secondary-side microcontroller. | Use Scenario: Multi-protocol wall charger supporting QC4+, AFC, Apple 2.4 A, and BC1.2 simultaneously. IC Role / Device Role / Timing Role: Legacy charge detection block on DP_GPIO4/DM_GPIO5 identifies device type within 100 ms; triggers appropriate voltage/current profile. Use Value: Eliminates need for separate QC/AFC IC and associated level shifters, reducing BOM count by ≥4 components. |
| Universal Laptop Power Adapter | Industrial USB-C Power Module |
Use Scenario: Field-replaceable 100 W adapter compatible with USB PD, PPS, and proprietary laptop charging. IC Role / Device Role / Timing Role: Dual CC channel (CC1/CC2) handles plug orientation detection and robust BMC communication under EMI stress. Use Value: Achieves >95% efficiency at 20 V/5 A output with <150 µs fault response time for OVP/SCP events. | Use Scenario: DIN-rail mounted USB-C power module supplying 12–20 V to embedded controllers and IoT gateways. IC Role / Device Role / Timing Role: VBUS_IN monitoring and LSCSA-based current limiting ensure stable output under variable industrial loads (e.g., motor start surge). Use Value: Supports continuous 3 A output at +105°C ambient with no derating, validated per IEC 62368-1 insulation requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB PD SR controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP6983GQ-Z | Standalone SR controller only; no integrated PD transceiver or legacy charging logic | Requires external PD controller (e.g., MPQ4282) and QC IC; higher system complexity | Select when cost-sensitive design uses primary-side PD negotiation and needs minimal SR feature set |
| STCH03TR | Integrates PD 3.0 PHY but lacks PPS support and LSCSA; no CC/CV dual-loop regulation | Supports fixed-voltage PD profiles only; cannot implement adaptive PPS or precise CC regulation | Select for basic 5–20 V fixed-output adapters where PPS and tight current tolerance are not required |
Compared with MP6983GQ-Z and STCH03TR, CYPD3184A1-24LQXQ uniquely delivers full USB PD 3.0 PPS, integrated LSCSA-based CC regulation, and multi-protocol legacy charging in one die-reducing bill-of-materials, PCB area, and firmware development effort for next-generation compact adapters.
Availability
CYPD3184A1-24LQXQ is available at Aetrix Electronics and suitable for USB PD 3.0 PPS adapters, Quick Charge 4.0+ chargers, and industrial USB-C power modules requiring stable component supply, long-term lifecycle assurance, and full production traceability.
Supply support for CYPD3184A1-24LQXQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor leader specializing in power management, automotive MCUs, and USB-C/PD solutions, with global manufacturing and quality certification to ISO 9001 and IATF 16949.
CYPD3184A1-24LQXQ belongs to the EZ-PD™ PAG1S product line, engineered specifically for high-efficiency, multi-protocol USB-C power adapters that require integrated SR control, PD 3.0 PPS negotiation, and legacy charging compatibility without external protocol co-processors.
FAQ
What is the maximum supported output power for CYPD3184A1-24LQXQ in a flyback topology?
The device is validated up to 65 W in reference designs (e.g., Infineon EVAL-PAG1S-65W), with SR_GDRV capable of driving 12 mΩ NFETs at 150 kHz. Thermal limits and PCB layout determine actual max power; at +105°C ambient, sustained 65 W requires ≥4 cm² copper pour on EPAD and ≤1.5 Ω total thermal resistance from junction to ambient.
Does CYPD3184A1-24LQXQ require an external microcontroller to implement USB PD PPS?
No. The integrated protocol engine executes full PD 3.0 stack-including structured VDM, PPS request/response, and Fast Role Swap-without external MCU. Firmware is pre-programmed and field-upgradable via CC pins; configuration is handled through Infineon's EZ-PD Configuration Utility tool.
How is overcurrent protection implemented using CSP and CSN pins?
OCP uses the LSCSA (CSP/CSN) with programmable gain (5–150) and internal offset cancellation. When sensed current exceeds the configured threshold, the device asserts SCP within 1.2 µs, disables SR_GDRV and VBUS_CTRL, and discharges VBUS_C. Threshold is set via firmware IDACs; typical trip point is 3.2 A with 5 mΩ sense resistor and gain = 100.
Can DP_GPIO4 and DM_GPIO5 be used simultaneously for USB 2.0 data and legacy charging detection?
No. These pins are functionally multiplexed: they operate as D+/D− for BC1.2/QC/AFC detection during power-up, but revert to standard GPIOs after enumeration. To support active USB 2.0 data transfer, an external USB 2.0 switch (e.g., TS3USB30) must be added-DP/DM on CYPD3184A1-24LQXQ are not data-path capable.
CYPD3184A1-24LQXQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- EZ-PD™ PAG1P
- Package/Case:
- 24-UFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Output Isolation:
- Isolated
- Internal Switch(s):
- No
- Voltage - Breakdown:
- -
- Topology:
- Flyback
- Voltage - Start Up:
- -
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Duty Cycle:
- -
- Frequency - Switching:
- 20kHz ~ 150kHz
- Power (Watts):
- -
- Fault Protection:
- -
- Control Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
- Mounting Type:
- Surface Mount
CYPD3184A1-24LQXQ FAQ
1.How can I place an order for CYPD3184A1-24LQXQ through Aetrix?
Please submit a Request for Quotation (RFQ) for CYPD3184A1-24LQXQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CYPD3184A1-24LQXQ reliable?
The price and inventory of CYPD3184A1-24LQXQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CYPD3184A1-24LQXQ is usually 5 days.
3.What payment methods are accepted for CYPD3184A1-24LQXQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CYPD3184A1-24LQXQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CYPD3184A1-24LQXQ?
CYPD3184A1-24LQXQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CYPD3184A1-24LQXQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CYPD3184A1-24LQXQ?
For technical support, including CYPD3184A1-24LQXQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CYPD3184A1-24LQXQ requirements.
6.How does Aetrix verify that CYPD3184A1-24LQXQ is sourced from the original manufacturer or authorized distributors?
All CYPD3184A1-24LQXQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CYPD3184A1-24LQXQ meets industry standards.
7.What is the process for return or replacement of CYPD3184A1-24LQXQ?
All CYPD3184A1-24LQXQ units undergo pre-shipment inspection (PSI). If there is an issue with CYPD3184A1-24LQXQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CYPD3184A1-24LQXQ part is unused and in its original packaging.
Return procedure for CYPD3184A1-24LQXQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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