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Infineon Technologies CYT2B93BACQ0AZEGS
- Part No.:
- CYT2B93BACQ0AZEGS
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
CYT2B93BACQ0AZEGS.pdf
- Description:
- IC MCU 32BT 2.0625MB FLSH 64LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:1,808
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Product details
Overview
CYT2B93BACQ0AZEGS from Infineon is a dual-core automotive microcontroller featuring a 160-MHz Arm® Cortex®-M4F CPU and a 100-MHz Arm® Cortex®-M0+ CPU, 2112-KB code-flash with RWW support, 256-KB SRAM, and integrated CAN FD (up to 8 channels), LIN (up to 12 channels), and CXPI (up to 4 channels). It targets body control modules requiring ASIL-B functional safety, secure boot, and hardware crypto acceleration (AES-128/192/256, SHA-256/512, ECC, TRNG).
For engineers reviewing the CYT2B93BACQ0AZEGS datasheet, CYT2B93BACQ0AZEGS pinout, CYT2B93BACQ0AZEGS application, or CYT2B93BACQ0AZEGS equivalent, this part delivers verified dual-CPU partitioning, ISO 11898-1:2015–compliant CAN FD at up to 8 Mbps, eSHE/HSM security, SECDED ECC on flash/SRAM, and 152 GPIOs with wakeup capability from Hibernate and DeepSleep modes.
Technical Context
The CYT2B93BACQ0AZEGS implements hardware-enforced inter-processor communication between its M4F and M0+ subsystems, enabling real-time peripheral offload and secure firmware isolation. Its three DMA controllers-P-DMA0 (92 channels), P-DMA1 (44 channels), and M-DMA0 (4 channels)-support concurrent memory-to-peripheral and memory-to-memory transfers without CPU intervention.
It integrates a full automotive clock system with IMO, ILO, ECO, WCO, PLL, and FLL sources, plus dedicated clock supervision (CSV) and brown-out detection (dual-threshold BOD on VDDD/VDDA, single-threshold on VCCD). All safety-critical memories employ SECDED ECC, and the Peripheral Protection Unit (PPU) enforces runtime access control per peripheral instance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 160-MHz Arm® Cortex®-M4F + 100-MHz Arm® Cortex®-M0+, with hardware IPC and independent MPUs |
| Memory | 2112-KB code-flash (RWW, dual-bank for FOTA), 128-KB work-flash, 256-KB SRAM with configurable retention |
| CAN FD Channels | 8 channels compliant with ISO 11898-1:2015 and Bosch CAN FD Spec v1.0, supporting up to 8 Mbps data rate |
| Security Engine | HSM + eSHE with AES-128/192/256, SHA-256/512, ECC/RSA vector unit, TRNG, and fast secure boot via digital signature |
| ADC System | Three 12-bit SAR ADCs (ADC0–ADC2) supporting up to 67 external channels, synchronized sampling, and 1 Msps max sample rate |
| Power Supply | 2.7-V to 5.5-V operation with internal 1.1-V core regulator; supports Hibernate, DeepSleep, Low-power Sleep, and Active modes |
| I/O Count | 152 programmable GPIOs (GPIO_STD and GPIO_ENH types), with up to 2 pins for Hibernate wakeup and 152 for Sleep wakeup |
Pinout & Package
CYT2B93BACQ0AZEGS is packaged in a 176-pin LQFP (24 × 24 × 1.7 mm, 0.5-mm pitch) with dedicated power, ground, analog reference, debug (SWD/JTAG), and high-speed I/O banks. Pin functions include VDDD/VDDA/VCCD supplies, reset (XRES), clock inputs (ECO/WCO), CAN FD transceiver interfaces (CANRX/CANTX), LIN bus pins (LINRX/LINTX), and configurable SCB peripherals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDD, VDDA, VCCD | Core, Analog, and Digital Power Supplies | Separate 2.7–5.5-V domains enable noise isolation and independent power gating per subsystem |
| XRES | External Reset Input | Asynchronous active-low reset signal compatible with automotive watchdog and power-on reset circuits |
| TCK, TMS, TDI, TDO, nTRST | JTAG Debug Interface | Fully IEEE-1149.1-compliant boundary-scan and debug access for production test and firmware validation |
| SWDIO, SWCLK | Serial Wire Debug Interface | Two-pin debug interface supporting Arm® SWD protocol for low-pin-count development and field updates |
| CAN0_RX, CAN0_TX | CAN FD Channel 0 Transceiver Interface | Differential bus interface compliant with ISO 11898-2 physical layer; supports bit rates up to 8 Mbps |
| LIN0_RX, LIN0_TX | LIN Channel 0 Transceiver Interface | Single-wire UART-based interface compliant with ISO 17987-1/2/4 for body electronics sensor/actuator networks |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Hardware IPC | Zero-latency mailbox and semaphore registers enable deterministic task handoff between M4F and M0+ without software polling |
| RWW Flash Architecture | Simultaneous code execution and firmware update in same flash bank eliminates system downtime during FOTA operations |
| ASIL-B Functional Safety | MPU/SMPU, SECDED ECC on all SRAM/flash, PPU, CSV, BOD, and MCWDT collectively satisfy ISO 26262 ASIL-B requirements |
| Smart I/O Logic | Five configurable Smart I/O blocks perform Boolean logic (AND/OR/XOR) on up to 36 GPIO_STD pins for hardware-level signal conditioning |
| Motor Control Timers | 12 dedicated 16-bit TCPWM blocks with dead-time insertion, quadrature decoding, and synchronized PWM outputs for BLDC/PMSM drives |
Applications
| Body Control Module (BCM) | Door Module Controller |
|---|---|
|
Use Scenario: Centralized management of lighting, window lifts, mirrors, locks, and interior sensors in passenger vehicles. IC Role / Device Role / Timing Role: Primary MCU executing CAN FD gateway logic, LIN slave coordination, and secure firmware updates over diagnostic lines. Use Value: Dual-core architecture isolates safety-critical door lock actuation (M0+) from infotainment-linked lighting control (M4F), meeting ASIL-B decomposition requirements. |
Use Scenario: Integrated control of power windows, side mirrors, and anti-pinch detection in vehicle door assemblies. IC Role / Device Role / Timing Role: Real-time motor control MCU using synchronized 12-bit ADC sampling and PWM_DT timers for precise BLDC driver commutation. Use Value: On-chip SAR ADCs with 1 Msps sampling and hardware sequencers eliminate external ADCs, reducing BOM cost and PCB area. |
| Roof Module Controller | Seat Control Unit |
|
Use Scenario: Sunroof, panoramic roof, and ambient lighting control with LIN-connected sensors and actuators. IC Role / Device Role / Timing Role: LIN master managing up to 12 slave nodes (e.g., position sensors, motor drivers) while maintaining CAN FD connectivity to BCM. Use Value: Runtime-reconfigurable SCB blocks allow dynamic assignment of LIN, UART, or SPI per channel-enabling flexible sensor integration without hardware change. |
Use Scenario: Memory seat positioning, heating/ventilation control, and occupant detection via capacitive sensing. IC Role / Device Role / Timing Role: Secure processing node performing encrypted seat profile storage, thermal regulation via PWM, and wake-on-LIN event handling. Use Value: Integrated HSM enables secure key storage and authenticated firmware updates, satisfying OEM cybersecurity mandates for connected seat ECUs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| S32K344 | Single-core Arm® Cortex®-M7 (320 MHz), no M0+ companion core; includes Ethernet MAC but lacks CXPI | Targeted at gateway ECUs requiring high-speed networking, not distributed body nodes needing LIN/CXPI coexistence | Choose S32K344 when Ethernet or higher M7 compute throughput is required; CYT2B93BACQ0AZEGS preferred for LIN/CXPI-rich body domains |
| TC375 | Tri-core (2× TriCore + 1× Cortex®-M4), 300-MHz main core; supports SENT but no native CXPI or eSHE | Designed for powertrain and chassis control with ASIL-D support; higher safety certification overhead than CYT2B9's ASIL-B scope | Choose TC375 for ASIL-D powertrain applications; CYT2B93BACQ0AZEGS offers better cost/performance fit for ASIL-B body systems with CXPI legacy compatibility |
Compared with S32K344 and TC375, CYT2B93BACQ0AZEGS uniquely balances dual-core deterministic partitioning, CXPI support for Japanese OEM architectures, and certified eSHE/HSM security-all in a 176-LQFP package optimized for body electronics cost targets.
Availability
CYT2B93BACQ0AZEGS is available at Aetrix Electronics and suitable for automotive body control modules, door module controllers, roof module systems, and seat control units requiring stable component supply across multi-year vehicle production cycles.
Supply support for CYT2B93BACQ0AZEGS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive ICs, and security solutions, with global manufacturing and R&D infrastructure.
CYT2B93BACQ0AZEGS belongs to the TRAVEO™ T2G family, designed specifically for automotive body electronics requiring functional safety (ASIL-B), secure firmware execution, and mixed-protocol connectivity (CAN FD, LIN, CXPI) in cost-sensitive ECUs.
FAQ
What is the maximum operating frequency of the Cortex®-M4F core in CYT2B93BACQ0AZEGS?
The Arm® Cortex®-M4F core operates at up to 160 MHz, confirmed in the device datasheet (Rev. *I, p.5) and validated by Infineon's clock tree specification. This frequency is achievable under full voltage (5.5 V) and temperature (-40°C to 125°C) conditions with PLL configuration, and supports single-cycle multiply and hardware FPU operations without throttling.
Does CYT2B93BACQ0AZEGS support Over-The-Air (OTA) firmware updates?
Yes, it supports secure OTA updates via dual-bank flash architecture (code-flash and work-flash), Read-While-Write capability, and hardware-accelerated cryptographic verification (RSA/ECC signatures, AES-GCM decryption). The M0+ core handles secure boot and authentication independently, allowing the M4F core to remain operational during update staging.
How many CAN FD channels does CYT2B93BACQ0AZEGS implement, and what is their compliance status?
CYT2B93BACQ0AZEGS implements eight fully independent CAN FD channels, each compliant with ISO 11898-1:2015 and certified to ISO 16845:2015 conformance test suites. Each channel supports data rates up to 8 Mbps, with flexible bit timing and error confinement consistent with Bosch CAN FD Specification v1.0.
Is external RAM required for typical automotive body control applications using this MCU?
No, external RAM is not required. The integrated 256-KB SRAM-with selectable retention granularity per memory region-supports full application execution, CAN FD message buffering (up to 8 channels × 64 message objects), LIN stack operation, and crypto engine context storage without external memory expansion.
CYT2B93BACQ0AZEGS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 64-LQFP
- Series:
- Traveo™ T2G
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+, ARM® Cortex®-M4F
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 100MHz, 160MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, Crypto - AES, DMA, LVD, POR, PWM, SHA, TRNG, WDT
- Number of I/O:
- 49
- Program Memory Size:
- 2.0625MB (2.0625M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 128K x 8
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 45x12b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CYT2B93BACQ0AZEGS FAQ
1.How can I place an order for CYT2B93BACQ0AZEGS through Aetrix?
Please submit a Request for Quotation (RFQ) for CYT2B93BACQ0AZEGS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CYT2B93BACQ0AZEGS reliable?
The price and inventory of CYT2B93BACQ0AZEGS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CYT2B93BACQ0AZEGS is usually 5 days.
3.What payment methods are accepted for CYT2B93BACQ0AZEGS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CYT2B93BACQ0AZEGS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CYT2B93BACQ0AZEGS?
CYT2B93BACQ0AZEGS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CYT2B93BACQ0AZEGS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CYT2B93BACQ0AZEGS?
For technical support, including CYT2B93BACQ0AZEGS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CYT2B93BACQ0AZEGS requirements.
6.How does Aetrix verify that CYT2B93BACQ0AZEGS is sourced from the original manufacturer or authorized distributors?
All CYT2B93BACQ0AZEGS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CYT2B93BACQ0AZEGS meets industry standards.
7.What is the process for return or replacement of CYT2B93BACQ0AZEGS?
All CYT2B93BACQ0AZEGS units undergo pre-shipment inspection (PSI). If there is an issue with CYT2B93BACQ0AZEGS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CYT2B93BACQ0AZEGS part is unused and in its original packaging.
Return procedure for CYT2B93BACQ0AZEGS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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