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Infineon Technologies CYT2B93CACQ0AZSGS
- Part No.:
- CYT2B93CACQ0AZSGS
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
CYT2B93CACQ0AZSGS.pdf
- Description:
- IC MCU 32BT 2.0625MB FLSH 64LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,099
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Product details
Overview
CYT2B93CACQ0AZSGS from Infineon is a dual-core automotive microcontroller featuring a 160-MHz Arm® Cortex®-M4F CPU and a 100-MHz Arm® Cortex®-M0+ CPU, integrated 2112-KB code-flash with RWW support, 256-KB SRAM with retention control, and hardware crypto engine supporting AES-128/192/256, SHA-256/512, ECC, and TRNG - deployed in body control units requiring ASIL-B functional safety compliance.
For engineers reviewing the CYT2B93CACQ0AZSGS datasheet, CYT2B93CACQ0AZSGS pinout, CYT2B93CACQ0AZSGS application, or CYT2B93CACQ0AZSGS equivalent, key selection considerations include dual-CPU inter-processor communication, eight CAN FD channels (up to 8 Mbps), CXPI/LIN interface count, flash bank configuration for FOTA, and SMPU/PPU-based peripheral protection architecture.
Technical Context
The CYT2B93CACQ0AZSGS implements a tightly coupled dual-CPU subsystem where the M4F handles real-time application processing and the M0+ manages security-critical tasks including secure boot, cryptographic operations, and peripheral isolation via PPU. Hardware mailbox and shared memory with SMPU enforcement enable deterministic inter-processor messaging.
Its clock system integrates IMO, ILO, ECO, WCO, PLL, and FLL sources, with configurable clock supervisors and brown-out detection at three voltage domains (VDDD/VDDA at 2.7 V or 3.0 V; VCCD at 1.1 V). All safety-critical memories employ SECDED ECC, and wakeup paths include up to 152 GPIOs, RTC alarms, and EVTGEN timers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 160-MHz Arm® Cortex®-M4F + 100-MHz Arm® Cortex®-M0+ |
| Flash Memory | 2112-KB code-flash + 128-KB work-flash; supports Read-While-Write and dual-bank FOTA |
| SRAM | 256-KB with configurable retention granularity per memory region |
| Crypto Engine | AES-128/192/256, SHA-256/512, ECC, RSA, TRNG, GCM, and eSHE/HSM support |
| CAN FD Channels | Up to 8 channels compliant with ISO 11898-1:2015 and Bosch CAN FD v1.0 |
| ADC Resources | Three 12-bit SAR ADCs (67 total external channels, 1 Msps max sampling rate, synchronized acquisition) |
| Package | 176-LQFP, 24 × 24 × 1.7 mm, 0.5-mm pitch, RoHS-compliant |
Pinout & Package
CYT2B93CACQ0AZSGS is housed in a 176-pin LQFP package (24 × 24 × 1.7 mm, 0.5-mm lead pitch) with dedicated power, ground, analog reference, debug (SWD/JTAG), and high-speed I/O banks. Pin functions are fully configurable via firmware-controlled alternate function registers.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDD / VDDA / VCCD | Core, Analog, and Digital Regulator Inputs | Supports 2.7–5.5-V operation with independent BOD thresholds (2.7/3.0 V on VDDD/VDDA; 1.1 V on VCCD) |
| P0.0–P11.7 | Programmable GPIO (Standard & Enhanced) | 152 total I/Os; GPIO_ENH supports smart logic, event routing, and motor-control PWM_DT |
| TCK / TMS / TDI / TDO / nTRST | JTAG Debug Interface | Fully IEEE-1149.1-compliant boundary scan and test access; supports ETM instruction/data trace |
| SWDIO / SWCLK | Serial Wire Debug Interface | Two-pin debug port enabling low-pin-count development and production programming |
| CANFD0_TX / CANFD0_RX – CANFD7_TX / CANFD7_RX | CAN FD Transceiver Interfaces | Eight differential pairs supporting up to 8 Mbps data rate; each channel independently configurable |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Inter-Processor Communication | Hardware mailbox + shared memory with SMPU-enforced access control enables deterministic task partitioning between M4F and M0+ |
| Firmware Update Over The Air (FOTA) | Dual-bank flash architecture with atomic swap and RWW allows seamless background updates without runtime interruption |
| ASIL-B Functional Safety Support | MPU/SMPU, PPU, SECDED ECC on SRAM/flash, MCWDT, CSV, and BOD/OVD/LVD provide layered fault containment |
| Motor Control Timing Precision | 75× 16-bit + 8× 32-bit TCPWM blocks with quadrature decode, dead-time insertion, and synchronized ADC triggering |
| Secure Boot & Authentication | Hardware-accelerated digital signature verification (ECDSA/ECC), fast secure boot, and HSM-managed key lifecycle |
Applications
| Body Control Module (BCM) | Door Module Controller |
|---|---|
|
Use Scenario: Centralized management of lighting, window lift, mirror adjustment, and seat position in modern automotive platforms. IC Role / Device Role / Timing Role: Primary MCU executing real-time control loops, LIN/CXPI slave communication, and secure firmware updates. Use Value: Dual-core separation isolates safety-critical door lock actuation from non-critical ambient lighting control, meeting ASIL-B requirements. |
Use Scenario: Localized control of power windows, side mirrors, and interior lighting within individual vehicle doors. IC Role / Device Role / Timing Role: LIN master node coordinating with BCM over LIN bus; executes PWM-driven motor control with <1 µs jitter tolerance. Use Value: Integrated 12-bit SAR ADCs with synchronized sampling monitor motor current and position feedback without external signal conditioning. |
| Roof Module Controller | Smart Junction Box |
|
Use Scenario: Sunroof actuation, panoramic roof shading, and rain sensor integration in premium vehicle roof systems. IC Role / Device Role / Timing Role: CAN FD endpoint handling high-bandwidth sensor fusion (rain, light, tilt) and motor position feedback. Use Value: Eight CAN FD channels allow concurrent communication with BCM, HVAC, and ADAS modules while maintaining 8 Mbps throughput. |
Use Scenario: Power distribution and load switching across chassis domains (front/rear, left/right) with diagnostic monitoring. IC Role / Device Role / Timing Role: High-side/low-side switch controller with built-in current sensing, thermal shutdown, and SPI-configurable protection thresholds. Use Value: Smart I/O blocks perform Boolean logic on GPIO inputs to implement hardware-level short-circuit detection before software intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core automotive MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SPC58EC80E5 | Power Architecture (e200z4/z7 cores), 2 MB flash, no integrated crypto engine, supports SENT but lacks CXPI | Targeted at powertrain ECUs; limited LIN/CXPI support reduces suitability for body domain gateways | Prefer when legacy Power Architecture toolchain compatibility or SENT sensor interfacing is required |
| S32K344 | Arm® Cortex®-M7/M4 dual-core, 8 MB flash, ASIL-D capable, includes Ethernet MAC but no CXPI or Smart I/O | Broadly used in gateway and domain controller roles; higher cost and complexity than needed for standalone BCM | Choose when Ethernet backbone integration or ASIL-D certification is mandatory |
Compared with SPC58EC80E5 and S32K344, CYT2B93CACQ0AZSGS delivers optimal balance of CAN FD bandwidth, CXPI/LIN density, and hardware-accelerated crypto for cost-sensitive body electronics - without over-provisioning core performance or memory for non-gateway use cases.
Availability
CYT2B93CACQ0AZSGS is available at Aetrix Electronics and suitable for body control modules, door module controllers, roof module controllers, and smart junction boxes requiring stable component supply across automotive production lifecycles.
Supply support for CYT2B93CACQ0AZSGS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive ICs, and security solutions, with global manufacturing and R&D infrastructure.
CYT2B9 belongs to the TRAVEO™ T2G family - engineered specifically for automotive body electronics requiring functional safety, secure firmware updates, and mixed-signal integration in compact packages.
FAQ
What is the maximum operating frequency of the Cortex-M4F core in CYT2B93CACQ0AZSGS?
The Arm® Cortex®-M4F core operates at up to 160 MHz, verified under full temperature and voltage range per Infineon's device-level specifications. This frequency is sustained using the internal PLL with ECO or IMO as reference, and includes single-cycle multiply and hardware FPU support for deterministic real-time math execution.
Does CYT2B93CACQ0AZSGS support hardware-based secure boot with public-key verification?
Yes - it implements fast secure boot using hardware-accelerated ECDSA signature verification against stored public keys in OTP memory. The boot ROM validates the signed application image hash before loading into SRAM, with rollback protection enforced via monotonic counters in dedicated secure memory.
How many CAN FD channels are physically implemented in the 176-LQFP package of CYT2B93CACQ0AZSGS?
All eight CAN FD channels are fully available in the 176-LQFP package, each with dedicated TX/RX pins mapped to separate I/O banks. Pin assignment tables in the datasheet confirm all eight differential pairs are routed and electrically characterized for 8 Mbps operation under ISO 11898-1:2015 compliance.
Is the 256-KB SRAM in CYT2B93CACQ0AZSGS partitioned for retention control, and how is it configured?
Yes - the 256-KB SRAM is divided into multiple regions, each individually configurable for retention during DeepSleep or Hibernate modes via the Power Management Unit (PMU) registers. Retention granularity is selectable per 4-KB block, enabling precise power optimization for wake-up context preservation without full memory retention.
CYT2B93CACQ0AZSGS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 64-LQFP
- Series:
- Traveo™ T2G
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+, ARM® Cortex®-M4F
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 100MHz, 160MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, Crypto - AES, DMA, LVD, POR, PWM, SHA, TRNG, WDT
- Number of I/O:
- 49
- Program Memory Size:
- 2.0625MB (2.0625M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 128K x 8
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 45x12b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
CYT2B93CACQ0AZSGS FAQ
1.How can I place an order for CYT2B93CACQ0AZSGS through Aetrix?
Please submit a Request for Quotation (RFQ) for CYT2B93CACQ0AZSGS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CYT2B93CACQ0AZSGS reliable?
The price and inventory of CYT2B93CACQ0AZSGS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CYT2B93CACQ0AZSGS is usually 5 days.
3.What payment methods are accepted for CYT2B93CACQ0AZSGS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CYT2B93CACQ0AZSGS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CYT2B93CACQ0AZSGS?
CYT2B93CACQ0AZSGS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CYT2B93CACQ0AZSGS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CYT2B93CACQ0AZSGS?
For technical support, including CYT2B93CACQ0AZSGS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CYT2B93CACQ0AZSGS requirements.
6.How does Aetrix verify that CYT2B93CACQ0AZSGS is sourced from the original manufacturer or authorized distributors?
All CYT2B93CACQ0AZSGS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CYT2B93CACQ0AZSGS meets industry standards.
7.What is the process for return or replacement of CYT2B93CACQ0AZSGS?
All CYT2B93CACQ0AZSGS units undergo pre-shipment inspection (PSI). If there is an issue with CYT2B93CACQ0AZSGS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CYT2B93CACQ0AZSGS part is unused and in its original packaging.
Return procedure for CYT2B93CACQ0AZSGS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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