Infineon Technologies IRS2166DPBF

Overview

IRS2166DPBF from Infineon Technologies is a fully integrated 600 V fluorescent ballast control IC combining critical-conduction-mode PFC, half-bridge driver, and lamp protection logic in a single SOIC-16 package. It delivers programmable preheat (73–81 kHz) and run frequencies (40–46 kHz), 1.0 µs deadtime, 15.6 V internal VCC zener clamp, and micropower startup (250 µA), enabling compact electronic ballasts for T5/T8 lamps.

For engineers reviewing the IRS2166DPBF datasheet, IRS2166DPBF pinout, IRS2166DPBF application, or IRS2166DPBF equivalent, key selection criteria include VBUS regulation tolerance (±0.1 V), CS overcurrent threshold (1.20 V typ), EOL latched shutdown (3.0 V threshold), and bootstrap MOSFET integration - all critical for lamp ignition reliability and end-of-life detection in commercial lighting systems.

Technical Context

The IRS2166DPBF implements a state-machine-driven ballast controller with five operational modes: UVLO, PREHEAT, IGNITION, RUN, and FAULT. Preheat initiates at 76 kHz with CPH charging via RPH; ignition ramps frequency to 43 kHz upon CPH > 10.8 V; RUN mode enables low-gain PFC and disables fault counter after CPH > 12.0 V.

Its PFC stage operates in critical conduction mode with VBUS regulation at 4.0 V (±0.1 V), THD < 10%, and PF > 0.98. Protection includes dual-threshold SD/EOL pin (5.0 V lamp removal, 3.0 V EOL latch), 100-event CS fault counter, and DC bus undervoltage reset at 3.0 V - all implemented without external comparators or timers.

Key Specifications

Pinout & Package

IRS2166DPBF is housed in a 16-lead SOIC package with exposed pad (RoHS-compliant, Pb-free). Pin functions are validated per Infineon PD60292 datasheet Rev. A.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fluorescent ballast control applications.

Compared with IRS2166DPBF, the PDIP variant trades thermal performance for assembly flexibility, while the IR2166DPBF omits key reliability enhancements - making the IRS2166DPBF the only choice for UL/EN61347-certified commercial ballasts requiring tight VBUS regulation and deterministic EOL shutdown.

Availability

IRS2166DPBF is available at Aetrix Electronics and suitable for commercial lighting ballasts, industrial high-bay fixtures, LED retrofit modules, and UV-C germicidal drivers requiring stable component supply, long-lifecycle support, and RoHS-compliant manufacturing.

Supply support for IRS2166DPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, automotive, and industrial control ICs, with core expertise in high-voltage gate drivers and energy-efficient lighting solutions.

The IRS2166D product line targets electronic fluorescent ballasts requiring integrated PFC, robust lamp protection, and programmable timing - designed specifically to replace multi-chip solutions in UL Class P and EN61347-compliant lighting systems.

FAQ

What is the function of the CPH pin in IRS2166DPBF?

The CPH pin serves as the preheat timing capacitor node that charges during preheat mode. Its voltage level determines state transitions: reaching 10.8 V triggers ignition mode (frequency ramp), and 12.0 V initiates run mode. In fault conditions, CPH discharges to 0 V, ensuring fail-safe shutdown.

Can IRS2166DPBF drive IGBTs directly?

Yes - the HO and LO outputs deliver 260 mA sink and 180 mA source current, sufficient to drive standard 15–30 A IGBTs used in 32–58 W fluorescent ballasts. The 600 V rating on HO and VS pins ensures safe operation with IGBTs in half-bridge configurations.

How does the IRS2166DPBF implement end-of-life detection?

It uses an internal OTA on the EOL pin biased at 2.0 V, replaced in IRS2166D with ±10 µA current sources. Lamp aging shifts cathode impedance, altering EOL pin current; crossing 3.0 V threshold triggers latched shutdown, preventing unsafe operation with depleted emitters.

Is external compensation required for the PFC error amplifier?

Yes - the COMP pin requires an external RC network (typically 10 kΩ + 1 nF) to stabilize the PFC loop. This network sets phase margin and transient response; values are calculated from VBUS regulation bandwidth (≈20 Hz) and gain requirements per Infineon AN-1065.