Infineon Technologies MB90F352SPFM-GS-113E1

Overview

MB90F352SPFM-GS-113E1 from Fujitsu Semiconductor is a 16-bit F2MC-16LX microcontroller with integrated FULL-CAN interface (V2.0 Part A/B), 128 KB Flash ROM, 4 KB RAM, and operation up to 24 MHz at +125°C. It features a 42 ns instruction execution time (with 4 MHz crystal ×6 PLL), 15-channel 8/10-bit ADC (3 µs conversion), and dual-bank Flash for concurrent read/write. Used in automotive body control modules requiring CAN-based sensor/actuator communication.

For engineers reviewing the MB90F352SPFM-GS-113E1 datasheet, MB90F352SPFM-GS-113E1 pinout, MB90F352SPFM-GS-113E1 application, or MB90F352SPFM-GS-113E1 equivalent, key selection criteria include CAN message buffer flexibility (16 mailboxes + FIFO mixing), sub-clock independence (internal 100 kHz CR oscillator), Flash security protection, and LQFP-64 package compatibility with automotive-grade thermal and EMI requirements.

Technical Context

The MB90F352SPFM-GS-113E1 implements the F2MC-16LX CPU core with 24-bit internal addressing and 16 MB memory space, supporting C-language compilation via enhanced instruction set (32-bit accumulator, RETI, barrel shift). Its on-chip PLL accepts 4 MHz input and generates machine clocks from 4–24 MHz with selectable division/multiplication factors.

Peripheral integration includes two 16-bit freerun timers (FRT0/FRT1), six 16-bit input capture channels (ICU), four 16-bit output compare channels (OCU), dual UART with LIN support, one I²C interface (400 kbps), and a dedicated delay interrupt generator for task scheduling - all coordinated through an 8-level, 34-condition interrupt controller with EI2OS and 16-channel DMA.

Key Specifications

Pinout & Package

LQFP-64 package (FPT-64P-M24, 10 mm × 10 mm, 0.50 mm pitch) with exposed thermal pad; pin functions validated per DS07-13737-4E Rev.4.0.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit automotive microcontroller applications.

Compared with RL78/F13 and S9KEAZ128AMLH, MB90F352SPFM-GS-113E1 uniquely combines FULL-CAN compliance with dual-bank Flash, hardware Flash security, and internal CR sub-clock - delivering higher functional safety assurance and lower system-level component count in ASIL-B–aligned body electronics.

Availability

MB90F352SPFM-GS-113E1 is available at Aetrix Electronics and suitable for automotive body control units, industrial CAN gateways, and smart HVAC controllers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MB90F352SPFM-GS-113E1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Fujitsu Semiconductor (now part of Socionext Inc. following 2017 acquisition) specialized in high-reliability automotive and industrial microcontrollers with emphasis on CAN integration and functional safety.

The MB90350 Series was designed specifically for automotive body electronics and industrial control nodes needing robust CAN communication, mixed-signal integration, and extended temperature operation without external timing or memory components.

FAQ

Does MB90F352SPFM-GS-113E1 support CAN FD?

No. The device implements ISO 11898-1 CAN 2.0 Part A and Part B only, with maximum bit rate of 1 Mbps. It does not support CAN Flexible Data-Rate (CAN FD) protocol features such as variable bit rates or extended data length. CAN FD capability requires newer-generation controllers like Fujitsu's FM4 series or third-party alternatives.

What is the purpose of the "S" suffix in MB90F352SPFM-GS-113E1?

The "S" suffix indicates the device omits external sub-clock pins (X0A/X1A) and instead uses the internal 100 kHz CR oscillator for low-power watch mode and wake-up functionality. This reduces external component count and PCB footprint while maintaining guaranteed sub-clock operation across temperature and voltage ranges.

Can the 128 KB Flash be erased in blocks smaller than the full array?

Yes. The Flash supports block-wise erase: boot block (2 KB), main blocks (16 KB each), and sector erase (512 bytes). Erase suspend/resume commands allow background operations, and block protection can be enabled using external VPP voltage to prevent accidental writes during field updates.

Is the 15-channel ADC simultaneously sampled?

No. The ADC is a successive-approximation register (SAR) type with single-sample-and-hold architecture. Channels are converted sequentially; total conversion time for all 15 channels at 10-bit resolution is approximately 45 µs (3 µs × 15), with software or hardware trigger control per channel.