Infineon Technologies MB90F378PFF-G-9012SPE1

Overview

MB90F378PFF-G-9012SPE1 from Fujitsu is a 16-bit F2MC-16LX microcontroller with 128 KB dual-operation flash (112 KB + 16 KB), 6 KB RAM, and integrated PS/2, LPC, SMBus-compliant I²C, and 12-channel 8/10-bit ADC. It features a 32-bit accumulator, 23 addressing modes, and programmable 8-level priority interrupts. Designed for keyboard controllers with smart battery management in PC peripheral systems.

For engineers reviewing the MB90F378PFF-G-9012SPE1 datasheet, MB90F378PFF-G-9012SPE1 pinout, MB90F378PFF-G-9012SPE1 application, or MB90F378PFF-G-9012SPE1 equivalent, key selection criteria include its 144-pin LQFP package, PLL-multiplying clock (4–20 MHz crystal → up to 80 MHz), 50 ns min instruction cycle at 5 MHz ×4 PLL, dual-bank flash concurrent read/erase capability, and native PS/2/LPC interface support for embedded system host communication.

Technical Context

The MB90F378PFF-G-9012SPE1 implements the F2MC-16LX CPU core with AT architecture inheritance, extended C-language support via enhanced multiplication/division and bit-manipulation instructions, and a 24-bit address space enabling 16 MB memory access. Its instruction set includes 351 opcodes and supports long-word data processing via an on-chip 32-bit accumulator.

It integrates three PS/2 interfaces (with 4 selectable sampling clocks), one LPC bus controller (including GA20 output and LAD0–LAD3 data/address lines), and two SMBus-compliant I²C channels (I²C1 and multi-address I²C2) with packet error checking and timeout detection - all optimized for low-latency host-peripheral coordination in keyboard and smart battery subsystems.

Key Specifications

Pinout & Package

Package: 144-pin LQFP (FPT-144P-M12, 0.4 mm pitch), RoHS-compliant, surface-mountable with thermal pad exposure per datasheet mechanical drawing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit microcontroller applications.

Compared with MB90F378PFF-G-9012SPE1, MB90F387G trades LPC/PS/2 for CAN and memory headroom, while RL78/G14 sacrifices hardware peripheral acceleration for broader low-power flexibility - making the MB90F378 uniquely fit for PC-ecosystem embedded controllers where interface offload and deterministic timing are non-negotiable.

Availability

MB90F378PFF-G-9012SPE1 is available at Aetrix Electronics and suitable for keyboard controller modules, smart battery packs, LPC-based peripheral bridges, and industrial HMI panels requiring stable component supply across production lifecycles.

Supply support for MB90F378PFF-G-9012SPE1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Fujitsu Microelectronics was a Japan-based semiconductor designer specializing in high-reliability microcontrollers for PC peripherals, industrial automation, and automotive systems before its MCU business was acquired by Cypress Semiconductor in 2013.

The MB90378 Series belongs to Fujitsu's F2MC-16LX product line, engineered specifically for real-time keyboard, smart battery, and LPC-attached peripheral control - emphasizing hardware-accelerated PS/2, SMBus, and low-latency interrupt response over general-purpose compute.

FAQ

What is the maximum operating frequency supported by the MB90F378PFF-G-9012SPE1?

The device supports a maximum internal PLL clock of 80 MHz, derived from a 4–20 MHz crystal input multiplied by 2×, 3×, or 4×. At 20 MHz crystal ×4 PLL, the CPU executes instructions at 50 ns minimum cycle time. Electrical specifications guarantee stable operation across 2.7–3.6 V supply and –40°C to +85°C ambient per industrial grade qualification.

Does the MB90F378PFF-G-9012SPE1 support in-circuit debugging?

Yes - it includes on-chip debug support via the JTAG interface (pins P66/Uck1, P67/Uo1, P70/Ui1, P71/Uck2, P72/Uo2, P73/Ui2) compatible with Fujitsu's FDT-2000 and third-party ICE tools. Debug features include hardware breakpoints, watchpoints, and real-time register/memory inspection without halting peripheral operation.

Can the dual-operation flash be used for secure firmware updates?

Yes - the dual-bank architecture allows one bank to execute active firmware while the other is erased and reprogrammed. Combined with the 256-byte boot ROM supporting secure boot vector checks and write-protection bits per sector, it enables atomic firmware swaps with rollback capability - critical for certified keyboard or battery firmware compliance.

Is the PS/2 interface compatible with both keyboard and mouse protocols?

Yes - all three PS/2 channels support full bidirectional PS/2 protocol including clock inhibition, resynchronization, and error recovery per IBM PS/2 specification. Each channel independently handles keyboard scan codes or mouse movement packets, with hardware-assisted parity generation and clock stretching to accommodate variable device timing.