Infineon Technologies MB90F543GPF-G

Overview

MB90F543GPF-G from Cypress Semiconductor is a 16-bit F2MC-16LX microcontroller with dual FULL-CAN interfaces (CAN 2.0A/B), 128 KB Flash ROM, 6 KB RAM, and 81 general-purpose I/O ports. It operates at up to 16 MHz system clock (via on-chip PLL ×4), achieves 62.5 ns minimum instruction execution time, and targets automotive body control modules requiring robust real-time communication and mixed-signal integration.

For engineers reviewing the MB90F543GPF-G datasheet, MB90F543GPF-G pinout, MB90F543GPF-G application, or MB90F543GPF-G equivalent, key selection criteria include dual CAN channel support, Flash programmability with block protection, 8/10-bit 8-channel ADC with 26.3 µs conversion, and QFP-100 package compatibility with industrial temperature range (−40 °C to +105 °C).

Technical Context

The MB90F543GPF-G implements the proprietary F2MC-16LX CPU core with 23 addressing modes, 32-bit accumulator for long-word arithmetic, and enhanced C-language support via system stack pointer and barrel shift instructions. Its interrupt subsystem supports 8 priority levels and 34 sources, including delayed-interrupt generation for task switching.

Dual FULL-CAN controllers provide flexible mailbox/FIFO hybrid buffering, automatic retransmission, remote frame response, and acceptance filtering (full-bit compare/mask or dual partial masks). The external bus interface enables up to 16 MB address space expansion with selectable 8-/16-bit data width.

Key Specifications

Pinout & Package

MB90F543GPF-G is housed in a 100-pin LQFP (7 mm × 7 mm, 0.5 mm pitch) package, pin-compatible with PQH100 and LQI100 footprints per Cypress documentation. Pin functions are multiplexed across I/O, peripheral, and power domains, with dedicated CANH/CANL pins assigned to P97/RX1 and P96/TX1 (Channel 1) and P95/RX0 and P94/TX0 (Channel 0).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-CAN microcontroller applications.

Compared with NXP S32K144 and Renesas RL78/F14, MB90F543GPF-G uniquely delivers dual classical CAN channels with mailbox/FIFO hybrid buffering, external bus expansion, and Flash block protection-making it optimal for legacy automotive architectures requiring parallel CAN networks and field-upgradable firmware without ARM licensing.

Availability

MB90F543GPF-G is available at Aetrix Electronics and suitable for automotive body control units, industrial CAN gateways, and commercial vehicle telematics hubs requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MB90F543GPF-G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) designs high-reliability microcontrollers and analog ICs for automotive, industrial, and IoT applications, with emphasis on functional safety and long-term supply stability.

The MB90540G/545G series was developed specifically for automotive body electronics and industrial control systems demanding dual-CAN connectivity, Flash-based firmware flexibility, and AEC-Q100-compliant operation at 105 °C junction temperature.

FAQ

What is the maximum CAN bit rate supported by MB90F543GPF-G?

The MB90F543GPF-G supports CAN bit rates up to 1 Mbps per channel, compliant with ISO 11898-2 physical layer requirements. This is achieved using internal timing registers configured for precise bit timing, with propagation, phase segment 1, phase segment 2, and synchronization jump width programmable per channel.

Does MB90F543GPF-G support in-system programming (ISP) of Flash memory?

Yes, MB90F543GPF-G supports ISP via on-chip embedded algorithms for Write, Erase, Erase-Suspend, and Erase-Resume operations. Programming requires external VPP (12.5 V) for block protection and uses standard UART0 or CAN0 for host interface-no external programmer is needed after initial bootload.

How many general-purpose I/O pins are available, and what are their electrical characteristics?

MB90F543GPF-G provides 81 general-purpose I/O pins, all configurable as push-pull outputs or Schmitt-trigger inputs. Each port supports bit-wise direction control and has TTL-compatible input thresholds (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V) and output drive strength of ±15 mA at V_CC = 5.0 V, meeting automotive load-driving requirements.

Is the 32 kHz sub-clock source internal or external?

The 32 kHz sub-clock is generated externally using a dedicated 32.768 kHz crystal connected to X0/X1 pins. The internal circuitry includes a low-power oscillator buffer and prescaler, enabling RTC operation and wake-up from STOP mode without activating the main PLL or system clock domain.