Infineon Technologies MB90F543GSPF-GS-9008

Overview

MB90F543GSPF-GS-9008 from Cypress Semiconductor is a 16-bit F2MC-16LX microcontroller with dual FULL-CAN interfaces (CAN 2.0A/B), 128 KB Flash ROM, 6 KB RAM, and 100-pin LQFP package. It operates at up to 16 MHz system clock (62.5 ns min instruction time), supports 8/10-bit A/D conversion across 8 channels (26.3 µs per conversion), and targets automotive body control modules requiring robust real-time communication and mixed-signal processing.

For engineers reviewing the MB90F543GSPF-GS-9008 datasheet, MB90F543GSPF-GS-9008 pinout, MB90F543GSPF-GS-9008 application, or MB90F543GSPF-GS-9008 equivalent, key selection criteria include dual CAN channel support, Flash programmability with block protection, 16-bit I/O timer with 8-input capture/4-output compare, UART0/UART1 baud rates up to 2 Mbps, and operation over −40°C to +105°C.

Technical Context

The MB90F543GSPF-GS-9008 implements the proprietary F2MC-16LX CPU core with 23 addressing modes, 32-bit accumulator, and enhanced C-language support via system stack pointer and barrel shift instructions. Its interrupt subsystem delivers 8 priority levels and 34 interrupt sources, including dedicated EI2OS for intelligent I/O service offloading.

It integrates two independent FULL-CAN controllers compliant with ISO 11898, each supporting flexible mailbox/FIFO buffering, automatic retransmission, remote frame response, and 1 Mbps data rate. The peripheral set includes four 8/16-bit PPG timers, dual 16-bit reload timers, one 16-bit free-run timer, and an external bus interface supporting up to 16 Mbytes address space.

Key Specifications

Pinout & Package

Package: LQFP-100 (14 mm × 14 mm, 0.5 mm pitch), RoHS-compliant, thermally optimized for automotive PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit automotive microcontroller applications.

Compared with RH850/F1L and TC1766, the MB90F543GSPF-GS-9008 offers optimal balance of dual CAN 2.0B compliance, Flash flexibility, and thermal ruggedness for cost-sensitive automotive modules where CAN FD or Ethernet are not yet mandated.

Availability

MB90F543GSPF-GS-9008 is available at Aetrix Electronics and suitable for automotive body control modules, industrial motor drive interfaces, commercial vehicle telematics gateways, and engine subsystem controllers requiring stable component supply across extended temperature ranges.

Supply support for MB90F543GSPF-GS-9008 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) designs high-reliability microcontrollers and programmable systems-on-chip for automotive, industrial, and IoT applications.

The MB90540G/545G series was developed specifically for automotive body electronics and industrial control systems requiring dual CAN 2.0B, Flash-based field-upgradability, and extended temperature operation without external memory.

FAQ

What is the minimum instruction execution time and under what conditions is it achieved?

The MB90F543GSPF-GS-9008 achieves a minimum instruction execution time of 62.5 ns when operating at a 16 MHz machine clock - generated by multiplying a 4 MHz crystal oscillator input by the on-chip PLL ×4. This timing assumes VCC = 5.0 V and applies to single-cycle instructions in the F2MC-16LX core's optimized instruction set.

Does this microcontroller support CAN FD or only classical CAN?

The MB90F543GSPF-GS-9008 supports only classical CAN per ISO 11898-1:2015 (CAN 2.0A and 2.0B), with data rates up to 1 Mbps. It does not implement CAN FD features such as flexible data-rate switching, extended data length, or CRC enhancements. Its dual CAN controllers are fully compatible with J1939 and CANopen legacy networks.

How is Flash memory protected against unintended writes or erases?

Flash protection is implemented via hardware block locking controlled by external programming voltage (Vpp) applied to the MD0–MD2 pins. Each Flash block can be individually locked/unlocked, and a dedicated boot block contains a hard-wired reset vector to ensure reliable startup even after partial erase operations.

What low-power modes are available and how do they differ?

Five low-power modes are supported: Sleep (CPU clock stopped, peripherals active), Stop (oscillator halted, RAM retained), CPU Intermittent Operation (periodic wake-up via watchdog), Watch (sub-clock domain active for RTC), and Hardware Stand-by (deepest state with minimal current draw). All modes retain RAM content and support wake-up via CAN, UART, or external interrupt.