Infineon Technologies MB91F526LWBPMC-GSK5E2

Overview

MB91F526LWBPMC-GSK5E2 from Infineon Technologies (formerly Cypress) is a 32-bit FR81S microcontroller designed for automotive powertrain and body control units. It features an 80 MHz CPU, 1024 + 64 KB program flash, 128 KB main RAM + 8 KB backup RAM, IEEE 754-compliant FPU, and triple CAN 2.0B controllers supporting up to 1 Mbps - deployed in engine control modules requiring deterministic real-time response and functional safety support.

For engineers reviewing the MB91F526LWBPMC-GSK5E2 datasheet, MB91F526LWBPMC-GSK5E2 pinout, MB91F526LWBPMC-GSK5E2 application, or MB91F526LWBPMC-GSK5E2 equivalent, key selection criteria include CAN channel count, 12-bit ADC channel availability (48 ch), RTC with sub-clock calibration, low-voltage detection reset (2.8 V ±8%), and -40 °C to +125 °C operation in LQFP-176 package.

Technical Context

The MB91F526LWBPMC-GSK5E2 implements the FR81S 32-bit RISC core with 5-stage pipeline, Harvard architecture, and MPU-enforced privilege separation across user/privileged modes. It integrates dual 12-bit ADC units (32 + 16 ch), three independent CAN controllers (128/64-message buffers), and a hardware CRC generator for firmware integrity verification.

Its clock system combines main oscillator (4–16 MHz), 32 kHz sub-oscillator with RTC calibration, CR oscillator (100 kHz), and SSCG-based PLL with 1×–20× multiplication. Power management includes Sleep/Stop/Watch/Sub RUN modes, with hardware watchdog and independent external/internal LVD reset sources.

Key Specifications

Pinout & Package

LQFP-176 (24 × 24 mm, 0.5 mm pitch) with exposed thermal pad; RoHS-compliant, lead-free finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 32-bit automotive microcontroller applications.

Compared with RH850/F1K and S32K344, the MB91F526LWBPMC-GSK5E2 offers superior analog integration (48-channel ADC, 2 DAC), deterministic real-time performance via FR81S pipeline, and unique sub-clock RTC calibration - making it optimal for cost-sensitive, high-channel-count automotive control where FPU-assisted signal processing is needed without full ASIL-D overhead.

Availability

MB91F526LWBPMC-GSK5E2 is available at Aetrix Electronics and suitable for engine control units, transmission control modules, and body control modules requiring stable component supply, long-term automotive lifecycle support, and qualified AEC-Q100 Grade 1 reliability.

Supply support for MB91F526LWBPMC-GSK5E2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor leader specializing in power management, automotive MCUs, and security solutions, with global manufacturing and automotive qualification expertise.

This device belongs to the CY91520 series - Infineon's legacy FR81S-based automotive MCU family targeting cost-optimized, high-integration powertrain and chassis control applications with functional safety readiness.

FAQ

What is the maximum operating frequency and corresponding instruction cycle time?

The MB91F526LWBPMC-GSK5E2 achieves a maximum CPU frequency of 80 MHz using its on-chip PLL with 4 MHz crystal input and 20× multiplication. This yields a minimum instruction execution time of 12.5 ns per basic instruction, confirmed in the electrical characteristics table (Section 11, Rev. *I). The FR81S core executes most instructions in one cycle due to its 5-stage pipeline and load/store architecture.

Does this MCU support CAN FD or only classical CAN 2.0B?

The MB91F526LWBPMC-GSK5E2 implements three classical CAN 2.0B controllers compliant with ISO 11898-1:2003, supporting bit rates up to 1 Mbps. It does not support CAN FD frame format, payload extension, or variable bit rate switching. Its CAN modules provide 128-message buffer for channel 0 and 64-message buffers for channels 1 and 2, with programmable acceptance filtering and loopback test mode.

What are the memory protection capabilities and how are they configured?

The MCU includes a Memory Protection Unit (MPU) with eight independently configurable protection areas, each defining address range, access privilege (user/privileged), and read/write/execute permissions. Configuration is performed via MPU control registers (MPUCR0–MPUCR7) during initialization. The MPU enforces privilege separation across both instruction and data accesses, supporting ASIL-B software partitioning requirements without external supervision.

Is the 32.768 kHz sub-oscillator used exclusively for RTC, or does it serve other timing functions?

The 32.768 kHz sub-oscillator serves dual roles: primary clock source for the Real-Time Clock (RTC) and secondary reference for sub-clock calibration logic that corrects main-to-sub clock ratio drift. It also enables ultra-low-power Watch mode operation and can be selected as the base clock for certain low-frequency timers. Its stability directly impacts RTC accuracy, which is enhanced by factory-trimmed prescaler values stored in OTP memory.