Infineon Technologies MB95F316EPMC-G-SNE2

Overview

MB95F316EPMC-G-SNE2 from Fujitsu Semiconductor is an 8-bit Flash microcontroller featuring the F2MC-8FX CPU core, 36 KB on-chip Flash memory, 1008 bytes RAM, 71 I/O ports (68 CMOS + 3 N-ch open-drain), and integrated LCD controller supporting 40 SEG × 4 COM (160-pixel) displays. It operates at up to 16.25 MHz machine clock and includes dual-bank Flash for concurrent read/program operations.

For engineers reviewing the MB95F316EPMC-G-SNE2 datasheet, MB95F316EPMC-G-SNE2 pinout, MB95F316EPMC-G-SNE2 application, or MB95F316EPMC-G-SNE2 equivalent, key selection criteria include its 8/10-bit 4-channel ADC, dual UART/SIO with full-duplex double buffer, hardware/software watchdog timers, low-voltage detection with five interrupt levels, and support for multiple standby modes including stop, sleep, watch, and time-base timer modes.

Technical Context

The MB95F316EPMC-G-SNE2 implements the F2MC-8FX CPU core with 136 basic instructions, 1–3 byte instruction length, and 61.5 ns minimum execution time at 16.25 MHz. It supports arithmetic operations up to 16-bit width and includes bit-test branch and bit-manipulation instructions optimized for real-time control tasks.

Its peripheral set integrates two 8/16-bit composite timers (configurable as 8-bit ×2 or 16-bit ×1), one 16-bit reload timer, two 8/16-bit PPG channels, one I²C channel with wake-up capability, two UART/SIO channels with NRZ format and selectable LSB/MSB transfer, and a 4-channel 8/10-bit ADC with resolution selection per channel.

Key Specifications

Pinout & Package

MB95F316EPMC-G-SNE2 is housed in an 80-pin plastic thin quad flat package (FPT-80P-M37), measuring 12 mm × 12 mm × 1.4 mm with 0.5 mm lead pitch and exposed thermal pad. Pin functions are defined per Fujitsu DS07-12628-2E Rev.2E.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit microcontroller applications.

Compared with MB95F314EPMC-G-SNE2 and MB95F318EPMC-G-SNE2, the MB95F316EPMC-G-SNE2 offers balanced memory (36 KB Flash / 1008 bytes RAM) ideal for mid-complexity embedded control-avoiding over-provisioning while ensuring headroom for feature updates and runtime data structures.

Availability

MB95F316EPMC-G-SNE2 is available at Aetrix Electronics and suitable for home appliance control panels, industrial sensor nodes, smart meter display modules, and medical diagnostic handhelds requiring stable component supply and long-term lifecycle support.

Supply support for MB95F316EPMC-G-SNE2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Fujitsu Semiconductor (now part of Socionext Inc. following 2017 spin-off) designed high-reliability microcontrollers for industrial, automotive, and consumer applications with emphasis on low-power operation and integrated analog peripherals.

The MB95310L/370L Series targets cost-sensitive, resource-constrained embedded systems requiring integrated LCD control, multi-channel ADC, and robust low-power management-especially in white goods and metering equipment.

FAQ

What is the maximum operating frequency and corresponding machine clock for MB95F316EPMC-G-SNE2?

The MB95F316EPMC-G-SNE2 supports an external main clock up to 32.5 MHz, yielding a maximum machine clock frequency of 16.25 MHz. When using the main PLL clock or main CR clock, the maximum machine clock remains 16.25 MHz. Minimum instruction execution time is 61.5 ns under this condition.

Does MB95F316EPMC-G-SNE2 support in-system programming via standard interfaces?

Yes-it supports asynchronous serial programming via a single-wire debug interface (1-wire serial control), enabling flash programming, erase, and verification without removing the device from the PCB. No JTAG or SWD interface is provided; all debug and programming functions use the dedicated single-pin protocol.

How many LCD segments and commons does the on-chip LCDC support, and what bias configurations are available?

The LCDC supports up to 40 segments and 4 commons (40×4 = 160 pixels) in static or multiplexed duty mode. It includes an internal resistor ladder for LCD bias voltage division and supports blinking control for individual segments or entire display groups without external components.

What are the supported low-power modes and their typical current consumption values?

MB95F316EPMC-G-SNE2 supports Stop mode (0.3 µA), Sleep mode (1.2 µA), Watch mode (1.8 µA), and Time-base timer mode (2.1 µA) at 3.3 V and 25°C. All modes retain RAM content and allow wake-up via external interrupt, UART activity, I²C address match, or watch counter overflow.