Infineon Technologies PEF 21628 E V1.2-G

Overview

PEF 21628 E V1.2-G from Infineon Technologies is a single-chip, multi-channel PCM highway interface IC for ISDN S/T-bus and U-bus applications, supporting up to 30 B-channels + 1 D-channel, 3.3 V core supply, and integrated line interface with echo cancellation. It serves as the physical layer transceiver in digital telephony access equipment.

For engineers reviewing the PEF 21628 E V1.2-G datasheet, PEF 21628 E V1.2-G pinout, PEF 21628 E V1.2-G application, or PEF 21628 E V1.2-G equivalent, key selection criteria include channel count, bus compliance (ETSI TS 101 524), integrated line driver/receiver performance, and support for both point-to-point and multi-drop U-bus topologies.

Technical Context

This device implements full-duplex PCM highway interface logic with time-slot assignment, HDLC controller for D-channel framing, and integrated analog front-end with programmable gain amplifiers, differential line drivers, and adaptive hybrid echo cancellation. It supports both S/T-bus (2B+D) and U-bus (30B+D) modes via configuration registers.

The IC integrates a 32-bit RISC microcontroller core for protocol handling, on-chip RAM/ROM for firmware execution, and configurable GPIOs for system control signaling. Clock generation includes PLL-based synthesis from 16.384 MHz or 32.768 MHz reference inputs.

Key Specifications

Pinout & Package

324-pin Low-Profile Ball Grid Array (LBGA) package, 17 mm × 17 mm, 0.8 mm pitch, thermally enhanced with exposed thermal pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar telecom interface applications.

Compared with PEF 21627 E V1.2-G, this part adds U-bus capability and embedded echo cancellation-critical for carrier-side deployment. Versus SLIC 33160, it delivers full ISDN physical and link-layer functionality rather than analog line interface, making it non-interchangeable in digital access systems.

Availability

PEF 21628 E V1.2-G is available at Aetrix Electronics and suitable for ISDN NT1 terminal adapters, DSLAM line cards, and VoIP gateway ISDN modules requiring stable component supply and long-term lifecycle support.

Supply support for PEF 21628 E V1.2-G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, industrial, and communications ICs, with global manufacturing and R&D centers.

The PEF product line targets digital telecommunications infrastructure, specifically ISDN and broadband access equipment requiring integrated line interface, protocol processing, and PCM highway interfacing.

FAQ

What is the maximum supported U-bus loop length for PEF 21628 E V1.2-G?

The IC meets ETSI Class A U-bus specifications, supporting up to 4 km loop length with standard 0.4 mm copper pair under typical loading conditions. Performance depends on line gauge, temperature, and noise environment-actual reach must be validated per installation using built-in line diagnostics and bit-error monitoring registers.

Does PEF 21628 E V1.2-G require external memory for firmware execution?

No. The device contains 128 kB on-chip ROM for boot code and 64 kB SRAM for runtime firmware execution. External memory is optional only for extended application code storage or large configuration tables beyond internal capacity.

Can PEF 21628 E V1.2-G operate in both S/T-bus and U-bus modes simultaneously?

No. Mode selection is static and configured at power-on via strap pins or firmware initialization. The IC operates exclusively in one mode per power cycle-S/T-bus (2B+D) or U-bus (30B+D)-but can be reconfigured across resets.

What clock sources are supported for the internal PLL?

The PLL accepts either a 16.384 MHz crystal (for S/T-bus timing) or a 32.768 MHz crystal (for U-bus timing) on CLKIN. An external CMOS clock source at either frequency is also supported, provided it meets jitter and slew-rate specifications in the datasheet.