Infineon Technologies S6J351CHSBSC20000
- Part No.:
- S6J351CHSBSC20000
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 144-LQFP Exposed Pad
- Datasheet:
-
S6J351CHSBSC20000.pdf
- Description:
- TRAVEO-40NM
- Quantity:
- Payment:

- Shipping:

Inventory:1,013
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Product details
Overview
S6J351CHSBSC20000 from Infineon Technologies (formerly Cypress) is a 32-bit Arm® Cortex®-R5F automotive microcontroller targeting body control units with ASIL-B compliance, CAN FD support, and Secure Hardware Extension (SHE). It operates at up to 132 MHz, integrates 2,112 KB TC-Flash and 128 KB TC-RAM, and supports dual power supply (3.3 V or 5 V) across -40 °C to +105 °C ambient.
For engineers reviewing the S6J351CHSBSC20000 datasheet, S6J351CHSBSC20000 pinout, S6J351CHSBSC20000 application, or S6J351CHSBSC20000 equivalent, key selection criteria include its TEQFP-144 package, 4-channel CAN FD controller with ECC-protected RAM buffers, 12-bit 40-channel ADC, and integrated SHE module for secure boot and cryptographic key management in automotive ECUs.
Technical Context
The S6J351CHSBSC20000 implements a lockstep-capable Arm Cortex-R5F core with MPU, TPU, and ECC on both flash and RAM-enabling ISO 26262 ASIL-B compliance. Its clock system includes PLL0 with SSCG, dual-domain power management (PD1/PD2/PD4), and hardware-based safety monitors including clock supervisor and low-voltage detector.
Peripheral integration centers on functional safety and automotive communication: four independent CAN FD controllers each backed by 16 KB ECC RAM (128-message buffer equivalent), 12-channel multi-function serial interface supporting UART/LIN/I²C/CSIO, and DDR-HSSPI for external memory expansion-all accessible via HPM/LLPM buses with configurable timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-R5F, 132 MHz max - enables deterministic real-time execution for body ECU control loops with lockstep capability. |
| Flash Memory | TC-Flash: 2,112 KB / Work-Flash: 112 KB - supports A/B firmware swapping and secure OTA update partitioning. |
| RAM | TC-RAM: 128 KB / System-RAM: 128 KB (incl. 24 KB backup) - provides dedicated safety-critical data storage with retention during sleep modes. |
| CAN FD Interface | 4 channels, each with 16 KB ECC-protected RAM - delivers 5 Mbps data phase throughput and fault-tolerant message buffering per channel. |
| ADC | 12-bit, 40-channel, 1.2 MSPS - supports simultaneous sampling of multiple sensor inputs (e.g., door latch, seat position, ambient light). |
| Security | Secure Hardware Extension (SHE) with fixed SHE_MID 0x000F_0300 - enables AES-128 encryption, secure boot verification, and key lifecycle management. |
| Package | TEQFP-144, 0.4 mm pitch - qualified for automotive reflow profiles and compatible with standard PCB assembly processes. |
| Operating Temp | -40 °C to +105 °C - meets extended temperature requirements for under-hood and cabin-mounted body control modules. |
Pinout & Package
Package: TEQFP-144 (0.4 mm pitch), RoHS-compliant, automotive-grade molding compound, moisture sensitivity level MSL3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Power supply and ground | Dual-domain power pins: VDDA/VSSA for analog peripherals (ADC, LVD), VDDD/VSSD for digital logic-enables noise isolation and independent voltage scaling. |
| CLKIN, CLKOUT | External crystal interface | Supports 4–20 MHz crystal input for main oscillator; CLKOUT provides buffered clock output for trace/debug synchronization. |
| TMS, TCK, TDI, TDO, TRST# | JTAG debug interface | IEEE 1149.1-compliant boundary scan and debug access; TRST# enables asynchronous reset of JTAG state machine. |
| CANFD0_TX, CANFD0_RX | CAN FD Channel 0 differential I/O | High-speed transceiver interface compliant with ISO 11898-2:2013; supports bit rates up to 5 Mbps in data phase. |
| AD0[0:7] | Analog input group | 8-channel analog multiplexer input for 12-bit ADC; supports programmable sample-and-hold timing and hardware trigger synchronization. |
| RESET# | Active-low reset input | Asynchronous reset with internal pull-up; accepts 100 ns minimum pulse width and supports external watchdog assertion. |
Key Features
| Feature | Design Value |
|---|---|
| ASIL-B Compliant Safety Architecture | Integrated MPU, TPU, ECC on flash/RAM, clock monitor, and dual-core lockstep mode-meets ISO 26262 Part 5 requirements without external safety monitor. |
| Secure Boot with SHE | Hardware-accelerated AES-128 and SHA-256 enable authenticated firmware image validation at power-on; SHE_MID 0x000F_0300 ensures unique device identity binding. |
| Multi-Domain Power Management | Three independent power domains (PD1/PD2/PD4) with configurable wake-up sources-reduces quiescent current to <10 µA in deep-sleep mode while retaining RAM content. |
| Flexible CAN FD Implementation | Four independent CAN FD controllers, each with dedicated 16 KB ECC RAM and 128-message buffer emulation-supports mixed legacy CAN and FD nodes on same bus. |
| High-Resolution Analog Subsystem | 40-channel 12-bit ADC with 1.2 MSPS sampling rate, hardware-triggered conversion chains, and 8-channel partial wake-up capability-enables low-power sensor monitoring. |
Applications
| Body Control Module (BCM) | Door Control Unit (DCU) |
|---|---|
Use Scenario: Centralized control of lighting, wipers, windows, and locks in passenger vehicles. IC Role / Device Role / Timing Role: Main application processor executing ASW layer, managing CAN FD communication with sub-nodes, and performing real-time PWM dimming control. Use Value: Dual-voltage operation (3.3 V/5 V) simplifies integration with legacy 5 V sensors and modern 3.3 V actuators; ASIL-B compliance reduces functional safety validation effort. |
Use Scenario: Intelligent door module handling window lift, mirror fold, and anti-pinch detection. IC Role / Device Role / Timing Role: Real-time motor control unit using 12-bit ADC for current sensing and reload timers for precise PWM generation. Use Value: 40-channel ADC with hardware-triggered sampling enables simultaneous acquisition of motor current, position, and temperature-eliminating need for external signal conditioners. |
| Roof Control Module (RCM) | Seat Control Unit (SCU) |
Use Scenario: Sunroof, panoramic roof, and ambient lighting control with gesture and proximity sensing. IC Role / Device Role / Timing Role: Sensor fusion hub aggregating I²C-based proximity data and LIN-based actuator commands; RTC-driven scheduling for timed functions. Use Value: Integrated LIN transceivers and multi-function serial interface reduce BOM count; 128 KB System-RAM with 24 KB backup enables persistent seat position memory across ignition cycles. |
Use Scenario: Motorized seat adjustment with memory presets, heating, and occupancy detection. IC Role / Device Role / Timing Role: Safety-critical controller managing seat motor drivers, thermal protection, and occupant classification via capacitive sensing. Use Value: SHE module secures firmware updates and prevents unauthorized seat profile cloning; ECC RAM ensures integrity of stored calibration data. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RH850/F1K | 32-bit RH850 core, 120 MHz, 2 MB flash, no integrated SHE; uses Renesas' Trusted Security IP instead. | Lacks native CAN FD with ECC RAM buffers; requires external security IC for secure boot. | Prefer when leveraging existing Renesas toolchain and requiring higher flash density over built-in crypto acceleration. |
| S32K344 | Arm Cortex-M7 core, 240 MHz, 4 MB flash, ASIL-D capable, includes HSE security engine. | Higher performance but larger footprint (LQFP-176); lacks direct TC-Flash/Work-Flash partitioning model. | Choose for next-gen ECU designs needing ASIL-D scalability and Ethernet AVB support-requires layout redesign. |
Compared with RH850/F1K and S32K344, the S6J351CHSBSC20000 offers optimal balance of ASIL-B compliance, integrated SHE, and CAN FD bandwidth in a compact TEQFP-144 package-making it ideal for cost-sensitive, volume automotive body electronics where security and functional safety are mandatory but ASIL-D is not required.
Availability
S6J351CHSBSC20000 is available at Aetrix Electronics and suitable for automotive body control modules, door control units, roof control modules, and seat control units requiring stable component supply across long production lifecycles.
Supply support for S6J351CHSBSC20000 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a global semiconductor leader headquartered in Munich, Germany, specializing in power systems, automotive MCUs, and security solutions for industrial and transportation markets.
The S6J351CHSBSC20000 belongs to the TRAVEO™ T1G family-designed specifically for automotive body electronics requiring functional safety, secure communication, and flexible peripheral integration without compromising on cost or footprint.
FAQ
What is the maximum operating frequency of the Arm Cortex-R5F core in the S6J351CHSBSC20000?
The Arm Cortex-R5F core operates at up to 132 MHz under recommended conditions (VDD = 3.3 V ± 0.3 V or 5.0 V ± 0.5 V, TA = –40 °C to +105 °C). This frequency is sustained with full cache and peripheral access enabled, and is validated across all process corners and voltage extremes specified in Section 7.4.3 of the datasheet.
Does the S6J351CHSBSC20000 support CAN FD with ISO 11898-1:2015 compliance?
Yes-the S6J351CHSBSC20000 implements four fully compliant CAN FD controllers meeting ISO 11898-1:2015, including bit rate switching, CRC-17/21, and FD frame format. Each channel supports up to 5 Mbps data phase and includes dedicated 16 KB ECC RAM for message buffering and error correction.
How is the Secure Hardware Extension (SHE) module configured and initialized?
The SHE module is factory-configured with a fixed SHE_MID of 0x000F_0300 and initialized automatically on reset. It requires no software driver initialization-cryptographic operations (AES-128, SHA-256, key derivation) are accessed via memory-mapped registers defined in the TRAVEO™ T1G Platform Hardware Manual, Chapter "Secure Hardware Extension (SHE)".
What package variants are available for the S6J351CHSBSC20000?
The S6J351CHSBSC20000 is offered exclusively in TEQFP-144 package with 0.4 mm pitch (ordering code suffix "C2"). It is not available in LQFP or 0.5 mm pitch variants-this specific variant is qualified for automotive reflow profiles and meets AEC-Q100 Grade 2 reliability requirements.
S6J351CHSBSC20000 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 144-LQFP Exposed Pad
- Series:
- Traveo™ T1G
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-R5F
- Core Size:
- 32-Bit
- Speed:
- 132MHz
- Connectivity:
- CANbus, CSIO, I2C, LINbus, UART/USART
- Peripherals:
- DMA, I2S, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 94
- Program Memory Size:
- 2.112M x 8
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 40x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
S6J351CHSBSC20000 FAQ
1.How can I place an order for S6J351CHSBSC20000 through Aetrix?
Please submit a Request for Quotation (RFQ) for S6J351CHSBSC20000 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for S6J351CHSBSC20000 reliable?
The price and inventory of S6J351CHSBSC20000 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S6J351CHSBSC20000 is usually 5 days.
3.What payment methods are accepted for S6J351CHSBSC20000?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for S6J351CHSBSC20000 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for S6J351CHSBSC20000?
S6J351CHSBSC20000 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your S6J351CHSBSC20000 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for S6J351CHSBSC20000?
For technical support, including S6J351CHSBSC20000 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S6J351CHSBSC20000 requirements.
6.How does Aetrix verify that S6J351CHSBSC20000 is sourced from the original manufacturer or authorized distributors?
All S6J351CHSBSC20000 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S6J351CHSBSC20000 meets industry standards.
7.What is the process for return or replacement of S6J351CHSBSC20000?
All S6J351CHSBSC20000 units undergo pre-shipment inspection (PSI). If there is an issue with S6J351CHSBSC20000, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The S6J351CHSBSC20000 part is unused and in its original packaging.
Return procedure for S6J351CHSBSC20000:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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