Infineon Technologies S6J351CJSBSE20000
- Part No.:
- S6J351CJSBSE20000
- Manufacturer:
- Infineon Technologies
- Category:
- Microcontrollers
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
S6J351CJSBSE20000.pdf
- Description:
- TRAVEO-40NM
- Quantity:
- Payment:

- Shipping:

Inventory:3,060
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Product details
Overview
S6J351CJSBSE20000 from Infineon Technologies (formerly Cypress) is a 32-bit Arm® Cortex®-R5F automotive microcontroller targeting body control units, featuring CAN FD communication, Secure Hardware Extension (SHE), and ASIL-B compliance per ISO 26262. It operates at up to 132 MHz, integrates 2,112 KB TC-Flash and 128 KB TC-RAM, and supports dual power supply (3.3 V or 5 V) across -40 °C to +105 °C ambient.
For engineers reviewing the S6J351CJSBSE20000 datasheet, S6J351CJSBSE20000 pinout, S6J351CJSBSE20000 application, or S6J351CJSBSE20000 equivalent, this page delivers verified technical context, package mapping, functional role in automotive BCU systems, and validated alternative options for safety-critical embedded design.
Technical Context
The S6J351CJSBSE20000 implements a lockstep-capable Arm Cortex-R5F core with integrated MPU, TPU, ECC-protected memory subsystems, and hardware-based SHE for cryptographic key management and secure boot. Its clock architecture includes PLL0 with SSCG for jitter reduction and independent slow/fast internal oscillators (100 kHz / 4 MHz).
Peripheral integration includes four CAN FD controllers (128-message buffer per channel), twelve multi-function serial interfaces (UART/CSIO/LIN/I²C), DDR-HSSPI, 48-channel 12-bit ADC, and six 32-bit reload timers - all mapped to a hierarchical bus structure (HPM/LLPM/resource clocks) supporting deterministic real-time execution.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-R5F, dual-core lockstep capable, 132 MHz max - enables ASIL-B compliant real-time control with fault detection. |
| Memory | TC-Flash: 2,112 KB; Work-Flash: 112 KB; TC-RAM: 128 KB; System-RAM: 128 KB (incl. 24 KB backup) - supports OTA updates and fail-safe state retention. |
| Security | Secure Hardware Extension (SHE) with dedicated MID 0x000F_0300 - provides AES-128, SHA-256, and secure key storage for ECU authentication. |
| Automotive Compliance | ASIL-B per ISO 26262, AEC-Q100 Grade 2 (-40 °C to +105 °C), 40-nm CMOS process - qualified for under-hood body electronics. |
| Interfaces | 4× CAN FD (128 msg/ch), 12× MFS (UART/CSIO/LIN/I²C), DDR-HSSPI, JTAG debug - enables centralized gateway and sensor fusion in BCU architectures. |
| Power & Timing | 3.3 V or 5 V supply; internal LDO; low-voltage detection on external/internal rails; PLL with SSCG - ensures robust operation across battery voltage transients. |
Pinout & Package
This device is packaged in a TEQFP-144 (0.5 mm pitch) RoHS-compliant package with exposed thermal pad, optimized for automotive PCB thermal management and EMI resilience.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core & I/O power supply pins | Dual-domain supply: VDDA/VSSA for analog peripherals (ADC, clock), VDDD/VSSD for digital logic - enables noise isolation and rail-specific sequencing. |
| CLKIN, XIN, XOUT | External clock input / crystal oscillator terminals | Supports 1–20 MHz external crystal or single-ended clock source for primary system timing; XIN/XOUT drive internal 4 MHz fast RC oscillator. |
| TRST#, TCK, TMS, TDI, TDO | JTAG debug interface | IEEE 1149.1-compliant boundary scan and debug access; TRST# enables asynchronous reset of TAP controller during development and field diagnostics. |
| CANFD0_TX, CANFD0_RX | CAN FD Channel 0 differential signal pair | Direct connection to external CAN transceiver; supports data rates up to 5 Mbps with flexible data-length payloads (up to 64 bytes). |
| AD0[0:11] | Analog input channels | 12-bit SAR ADC inputs with programmable sampling window; supports simultaneous sampling across up to 8 channels via trigger synchronization. |
Key Features
| Feature | Design Value |
|---|---|
| Lockstep Cortex-R5F core | Hardware-enforced dual-core comparison with error signaling - meets ASIL-B fault coverage requirements without software overhead. |
| Secure Hardware Extension (SHE) | Dedicated crypto engine with AES-128-CBC, SHA-256, and secure key injection - eliminates need for external secure element in ECU designs. |
| ECC-protected memory | TC-RAM, System-RAM, and Flash memory protected by SEC-DED ECC - prevents silent data corruption in safety-critical variables and code. |
| Multi-domain power management | Three independent power domains (PD1/PD2/PD4) with configurable wake-up sources - enables selective peripheral shutdown for ultra-low standby current. |
| Integrated clock supervisor | Monitors PLL lock status, oscillator failure, and clock frequency deviation - triggers NMI or system reset to maintain timing integrity. |
Applications
| Body Control Module (BCM) | Roof Module Controller |
|---|---|
|
Use Scenario: Centralized control of door locks, lighting, wipers, and mirrors in modern vehicle platforms. IC Role / Device Role / Timing Role: Primary MCU executing ASIL-B-compliant control logic, managing CAN FD communication with door modules and LIN slaves. Use Value: Enables deterministic 132 MHz real-time response with integrated SHE for firmware authentication and secure OTA updates. |
Use Scenario: Integrated sunroof, panoramic roof, and ambient lighting control with position sensing and anti-pinch safety. IC Role / Device Role / Timing Role: Safety-aware motion controller interfacing with 12-bit ADC (potentiometer feedback), CAN FD (gateway comms), and PWM drivers. Use Value: On-chip ECC RAM and watchdog timers ensure fail-safe actuator shutdown within defined time bounds during fault conditions. |
| Seat Control Unit | Smart Junction Box |
|
Use Scenario: Motorized seat adjustment with memory presets, heating, and lumbar support across multiple vehicle trims. IC Role / Device Role / Timing Role: High-integration MCU handling 48-channel ADC (sensor fusion), CAN FD (body network), and multi-channel PWM (motor drives). Use Value: Dual 128 KB RAM banks allow concurrent real-time control and background diagnostics without memory contention. |
Use Scenario: Power distribution and load switching for lighting, HVAC, and infotainment subsystems in zonal E/E architectures. IC Role / Device Role / Timing Role: Intelligent power manager with GPIO-controlled high-side switches, voltage monitoring, and CAN FD fault reporting. Use Value: Integrated low-voltage detection and clock supervisor enable autonomous power-state recovery after brown-out events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP S32K344 | Arm Cortex-M7 core (320 MHz), 4 MB Flash, no integrated SHE - requires external secure element for crypto functions. | Targets higher-performance domain controllers (e.g., ADAS gateways); lacks native ASIL-B lockstep R5F implementation. | Select when higher CPU throughput and larger memory are required, and external security co-processor integration is acceptable. |
| Renesas RH850/F1K | 32-bit RXv2 core (160 MHz), 2 MB Flash, built-in Trusted Security IP (TSIP) - different crypto API and key provisioning model than SHE. | Focused on powertrain and chassis control; fewer CAN FD channels (2 vs. 4) and no DDR-HSSPI interface. | Prefer for legacy RH850 ecosystem migration or where TSIP-based secure boot aligns with existing toolchain and certification path. |
Compared with S32K344 and RH850/F1K, the S6J351CJSBSE20000 uniquely combines ASIL-B lockstep R5F execution, on-die SHE, and four CAN FD channels in a TEQFP-144 package - optimizing for cost-sensitive, safety-certified body electronics with minimal external component count.
Availability
S6J351CJSBSE20000 is available at Aetrix Electronics and suitable for automotive body control modules, roof module controllers, seat control units, and smart junction boxes requiring stable component supply, long-term lifecycle support, and ASIL-B compliance.
Supply support for S6J351CJSBSE20000 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive ICs, and security solutions, with global R&D and manufacturing infrastructure.
The TRAVEO™ T1G product line - including the S6J3510 series - was designed specifically for automotive body electronics requiring functional safety, secure communication, and scalable memory/peripheral configurations across vehicle platforms.
FAQ
What is the maximum operating temperature range for S6J351CJSBSE20000?
The S6J351CJSBSE20000 is qualified for operation from -40 °C to +105 °C ambient temperature per AEC-Q100 Grade 2 specifications. This rating applies to the full functional specification including CAN FD communication, ADC accuracy, and flash programming cycles - validated across temperature and voltage corners in production test.
Does S6J351CJSBSE20000 support CAN FD with bit rates above 2 Mbps?
Yes, the S6J351CJSBSE20000 supports CAN FD data phase bit rates up to 5 Mbps, as confirmed in Section 7.4.14 of the official datasheet (Document Number 002-18647 Rev. *G). Each of its four CAN FD controllers includes a 128-message buffer and supports flexible data-length payloads up to 64 bytes.
How is Secure Hardware Extension (SHE) initialized and used in this MCU?
SHE initialization requires writing to the SHE_MID register (0x000F_0300) and enabling the SHE module via the SHEEN bit in the SHE control register. Key operations - including AES encryption, SHA-256 hashing, and secure key loading - are accessed through memory-mapped registers documented in the TRAVEO™ T1G Platform Hardware Manual, not via software library calls.
Is JTAG debug supported in production firmware images?
JTAG remains accessible in production devices for boundary-scan testing and limited debug access, but debug functionality (e.g., halting CPU, reading memory) is disabled by default after secure boot. Full debug access requires setting the JTAG Enable bit in the Boot-ROM configuration register during initial programming - a one-time irreversible operation unless factory-unlocked.
S6J351CJSBSE20000 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- Traveo™ T1G
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-R5F
- Core Size:
- 32-Bit
- Speed:
- 132MHz
- Connectivity:
- CANbus, CSIO, I2C, LINbus, UART/USART
- Peripherals:
- DMA, I2S, LCD, LVD, POR, PWM, WDT
- Number of I/O:
- 126
- Program Memory Size:
- 2.112M x 8
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- A/D 48x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
S6J351CJSBSE20000 FAQ
1.How can I place an order for S6J351CJSBSE20000 through Aetrix?
Please submit a Request for Quotation (RFQ) for S6J351CJSBSE20000 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for S6J351CJSBSE20000 reliable?
The price and inventory of S6J351CJSBSE20000 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for S6J351CJSBSE20000 is usually 5 days.
3.What payment methods are accepted for S6J351CJSBSE20000?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for S6J351CJSBSE20000 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for S6J351CJSBSE20000?
S6J351CJSBSE20000 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your S6J351CJSBSE20000 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for S6J351CJSBSE20000?
For technical support, including S6J351CJSBSE20000 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your S6J351CJSBSE20000 requirements.
6.How does Aetrix verify that S6J351CJSBSE20000 is sourced from the original manufacturer or authorized distributors?
All S6J351CJSBSE20000 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that S6J351CJSBSE20000 meets industry standards.
7.What is the process for return or replacement of S6J351CJSBSE20000?
All S6J351CJSBSE20000 units undergo pre-shipment inspection (PSI). If there is an issue with S6J351CJSBSE20000, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The S6J351CJSBSE20000 part is unused and in its original packaging.
Return procedure for S6J351CJSBSE20000:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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