Infineon Technologies 1EDN7116GXTMA1

Overview

1EDN7116GXTMA1 from Infineon is a single-channel, high-side-capable gate driver IC optimized for GaN Schottky Gate HEMTs and Si MOSFETs, featuring Truly Differential Input (TDI), ±200 V common-mode input range, 4 A peak source/sink current, active Miller clamp (5 A sink), and adjustable negative charge pump for V_OFF. It enables robust high-frequency switching in resonant wireless power and BLDC motor drives.

For engineers reviewing the 1EDN7116GXTMA1 datasheet, 1EDN7116GXTMA1 pinout, 1EDN7116GXTMA1 application, or 1EDN7116GXTMA1 equivalent, key selection criteria include TDI noise immunity, bootstrap clamp functionality, Miller clamp strength, V_OFF adjustability, and compatibility with 3.3 V/5 V logic inputs without external gate resistors.

Technical Context

The 1EDN7116GXTMA1 implements a fully differential amplifier + Schmitt-trigger input stage to reject common-mode transients up to ±200 V at dV/dt ≤ 100 V/ns, enabling direct high-side operation without isolators. Its TDI architecture uses matched external 33 kΩ resistors on IN+ and IN− to scale ±150 V static CMV into safe CMOS-level signals.

It integrates an active bootstrap clamp to prevent overcharging during dead-time, a 5 A active Miller clamp to suppress dv/dt-induced turn-on, and an adjustable charge pump (via VOFF_ADJ resistor) to generate programmable negative turn-off voltage (–2 V to –5 V), enhancing GaN HEMT reliability under fast switching.

Key Specifications

Pinout & Package

1EDN7116GXTMA1 is housed in a thermally enhanced PG-VSON-8 (3.0 × 3.0 mm, 0.5 mm pitch) package with exposed thermal pad (VSS-connected) for low-θ_JA performance in high-power density designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-side GaN gate driver applications.

Compared with 1EDN7126GXTMA1, this part trades peak current and blanking time for tighter timing control and lower EMI in mid-power resonant systems; versus UCC27611DR, it delivers full GaN-optimized integration-eliminating six external components while improving noise immunity and reliability.

Availability

1EDN7116GXTMA1 is available at Aetrix Electronics and suitable for Class-E wireless power transmitters, BLDC motor inverters, synchronous rectifiers, and Class-D audio amplifiers requiring stable component supply across industrial and consumer production programs.

Supply support for 1EDN7116GXTMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive ICs, and wide-bandgap solutions, with leadership in GaN and SiC device ecosystems.

This part belongs to the EiceDRIVER™ TDI family, designed specifically to simplify high-reliability GaN HEMT gate driving in high-frequency, high-efficiency power conversion systems without external isolation or bias circuitry.

FAQ

What logic voltage levels does 1EDN7116GXTMA1 support?

The device supports both 3.3 V and 5 V controller logic inputs. For 3.3 V, use 33 kΩ resistors on IN+ and IN−; for 5 V, use 68 kΩ. These values scale common-mode voltages to safe internal CMOS levels while maintaining ±0.1 % matching tolerance for full ±150 V static CMV rejection.

How does the active Miller clamp prevent false turn-on in GaN HEMTs?

The clamp provides a dedicated 5 A low-impedance path from the gate to V_OFF during high dv/dt events, actively pulling the gate below threshold faster than parasitic C_gd can induce turn-on. This is significantly stronger than typical 1–2 A clamps and validated for >100 V/ns transients in CoolGaN applications.

Can 1EDN7116GXTMA1 be used in low-side-only configurations?

Yes - it operates reliably as a low-side driver with full TDI functionality. The differential input rejects ground bounce during fast GaN switching, and the active Miller clamp remains effective. No configuration change is needed; simply tie BST to VDD and omit bootstrap components.

What is the purpose of the CF+ and CF− pins?

CF+ and CF− connect an external flying capacitor to implement the adjustable negative charge pump. This generates the V_OFF rail (–2 V to –5 V) used by OUT_SNK during turn-off. The VOFF_ADJ pin sets the target voltage via a resistor to VSS, enabling optimization for specific GaN gate threshold and layout parasitics.