Diodes Incorporated AP2122AK-2.8TRE1

Overview

AP2122AK-2.8TRE1 from Diodes Incorporated is a fixed-output 2.8 V, high-speed, ultra-low-noise LDO regulator in SOT-23-5 package, delivering up to 150 mA output current with 150 mV typical dropout at 100 mA, 30 µV_rms output noise (10 Hz–100 kHz), and ±2% output voltage accuracy. It integrates an enable pin (active-high, internal pull-down), supports ceramic capacitors ≥1 µF, and targets precision power rails in portable audio and imaging subsystems.

For engineers reviewing the AP2122AK-2.8TRE1 datasheet, AP2122AK-2.8TRE1 pinout, AP2122AK-2.8TRE1 application, or AP2122AK-2.8TRE1 equivalent, key selection criteria include dropout performance at 100 mA, RMS noise floor under 35 µV, CE input logic thresholds, thermal resistance (θ_JA = 250 °C/W), and compatibility with low-ESR ceramic output capacitors.

Technical Context

This CMOS-based LDO employs an internal voltage reference, error amplifier, and resistor network for precise 2.8 V regulation, with dedicated current-limit and chip-enable circuitry. Its architecture delivers fast line/load transient response and stable operation with 1 µF ceramic output capacitance (ESR 0.01–100 Ω).

The device operates across -40°C to +85°C junction temperature, accepts 2–6 V input, and achieves 70 dB PSRR at 10 kHz. Standby current is 0.1 µA typical, quiescent current 25 µA typical, and output voltage drift is ±280 µV/°C over temperature.

Key Specifications

Pinout & Package

SOT-23-5 package: 2.9 mm × 1.6 mm × 1.1 mm body, 0.95 mm lead pitch, thermally enhanced die pad (pin 2 is GND, connected to exposed thermal pad).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with AP2122AK-2.8TRE1, AP7315-28W5-7 trades enable control and lower noise for higher current capability, while MCP1700-2802E/TO sacrifices dropout performance and interface compatibility to meet cost-sensitive industrial requirements.

Availability

AP2122AK-2.8TRE1 is available at Aetrix Electronics and suitable for mobile audio subsystems, CMOS image sensor biasing, wearable health monitors, and industrial IoT sensor nodes requiring stable component supply with guaranteed long-term sourcing.

Supply support for AP2122AK-2.8TRE1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor manufacturer specializing in discrete, analog, and mixed-signal solutions for power management, signal integrity, and connectivity applications.

The AP2122 series belongs to Diodes' high-performance LDO portfolio, designed specifically for battery-powered portable electronics where ultra-low noise, low dropout, and minimal quiescent current are essential for system-level power efficiency and signal fidelity.

FAQ

What is the minimum input voltage required for AP2122AK-2.8TRE1 to maintain regulation at 100 mA load?

The minimum input voltage is calculated as V_OUT + V_DROP = 2.8 V + 0.15 V = 2.95 V. At 100 mA, the typical dropout is 150 mV, so regulation is maintained down to 2.95 V input. Absolute maximum dropout is 300 mV per datasheet, meaning 3.1 V input guarantees regulation across all process/voltage/temperature corners.

Can AP2122AK-2.8TRE1 be used with a 0.47 µF output capacitor?

No. The datasheet specifies a minimum output capacitance of >1 µF with ESR between 0.01 Ω and 100 Ω for stability. A 0.47 µF capacitor violates the minimum value requirement and risks oscillation or poor transient response. Ceramic capacitors rated 1 µF X5R or X7R (1206 or larger) are recommended.

Is the NC pin (Pin 5) required to be grounded or left floating?

Pin 5 is explicitly designated "No Connection" in the datasheet and functional block diagram. It has no internal bond wire or circuitry. It must be left floating - grounding or connecting it may cause unpredictable behavior or damage due to unintended internal node coupling.

How does the built-in CE pull-down resistor affect system-level enable timing?

The internal CE pull-down resistor (typical 5 MΩ) ensures the device remains disabled on power-up until the host GPIO asserts a valid high level (>1.5 V). Rise time from disable to enable is governed by GPIO drive strength and trace capacitance, not the pull-down value; the 5 MΩ resistor only sets the default state and draws negligible current (<0.1 µA at 3.3 V).