Diodes Incorporated AP2128K-1.0TRG1

Overview

AP2128K-1.0TRG1 from BCD Semiconductor is a fixed-output 1.0V, 300mA CMOS low-dropout regulator in SOT-23-5 package, featuring 1400mV dropout at 300mA, ±2% output voltage accuracy, and 60µV_rms output noise-designed for powering core logic rails in notebook computers and motherboard VRM post-regulation stages.

For engineers reviewing the AP2128K-1.0TRG1 datasheet, AP2128K-1.0TRG1 pinout, AP2128K-1.0TRG1 application, or AP2128K-1.0TRG1 equivalent, key selection criteria include dropout performance at 1.0V output, shutdown threshold compatibility (0–0.4V low / 1.5–6V high), soft-start timing (50µs), thermal shutdown behavior (165°C), and ceramic capacitor support (1µF C_IN/C_OUT).

Technical Context

The AP2128K-1.0TRG1 uses a PMOS pass transistor architecture enabling ultra-low quiescent current (60µA typical) and stable regulation down to 2.5V input across its full 1.0V output range. Its internal reference (0.8V) and feedback network are trimmed for ±2% output accuracy over –40°C to +85°C ambient.

It integrates active shutdown control with 0.1µA standby current, auto-discharge MOSFET (R_DS(ON) = 60Ω), and thermal foldback protection triggered at 165°C with 30°C hysteresis-ensuring safe operation under load transients and thermal stress in space-constrained portable systems.

Key Specifications

Pinout & Package

SOT-23-5 package: 2.82 × 2.65 × 1.45 mm body, 0.95 mm lead pitch, gull-wing leads, RoHS-compliant green finish (G1 suffix).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar fixed-output LDO regulator applications.

Compared with XC6206P102MR and RT9193-10GB, AP2128K-1.0TRG1 uniquely balances ultra-low noise (60µV_rms), integrated shutdown with discharge, and predictable thermal protection-making it optimal for mixed-signal SoC power domains where noise, sequencing, and reliability are co-constrained.

Availability

AP2128K-1.0TRG1 is available at Aetrix Electronics and suitable for notebook computers, motherboard VRM auxiliary rails, and industrial sensor node MCU cores requiring stable component supply with guaranteed green (RoHS/G1) compliance and tape-and-reel packaging.

Supply support for AP2128K-1.0TRG1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

BCD Semiconductor Manufacturing Limited is a Shanghai-based analog IC designer specializing in high-performance power management and precision analog products for consumer, computing, and industrial markets.

The AP2128 series belongs to BCD's ultra-low-noise LDO portfolio, engineered specifically for post-regulation of noise-sensitive digital and mixed-signal circuits in portable and space-constrained applications.

FAQ

What is the minimum input voltage required for AP2128K-1.0TRG1 to maintain regulation at 300mA load?

The AP2128K-1.0TRG1 requires VIN ≥ 2.4V to sustain 1.0V output under 300mA load, based on its 1400mV typical dropout voltage (1.0V + 1.4V = 2.4V). At lower input voltages, output collapses proportionally; absolute minimum VIN is 2.5V per recommended operating conditions.

Can AP2128K-1.0TRG1 be used with ceramic output capacitors smaller than 1µF?

No-BCD specifies 1µF ceramic for both C_IN and C_OUT to ensure stability, transient response, and PSRR performance. Using <1µF risks oscillation, degraded load regulation, and reduced ripple rejection, as confirmed by stability analysis in the datasheet's application section.

Does the NC pin (Pin 5) require any PCB layout treatment?

Pin 5 is unconnected internally in the fixed-output AP2128K-1.0TRG1 variant and must remain electrically floating-no solder mask opening, no trace, and no connection to GND or any other net. Routing traces or vias to this pad may induce parasitic coupling or mechanical stress.

How does the auto-discharge function behave during shutdown?

When SHUTDOWN is pulled low (≤0.4V), the internal 60Ω MOSFET connects VOUT to GND, discharging the output capacitor within ~60µs (τ = R×C = 60Ω × 1µF). This prevents residual voltage from interfering with downstream logic reset sequences or causing latch-up in multi-rail systems.