Diodes Incorporated AP7341-135FS4-7

Overview

AP7341-135FS4-7 from Diodes Incorporated is a 300mA, 1.35V fixed-output low-dropout linear regulator (LDO) in X2-DFN1010-4 package, featuring ±1% output voltage accuracy, 75dB PSRR at 1kHz, 60µV_rms output noise (10Hz–100kHz), and ultra-low 35µA quiescent current. It integrates enable control, short-circuit protection, and thermal shutdown, and is optimized for RF supply rails and noise-sensitive analog circuitry in portable communication devices.

For engineers reviewing the AP7341-135FS4-7 datasheet, AP7341-135FS4-7 pinout, AP7341-135FS4-7 application, or AP7341-135FS4-7 equivalent, key selection criteria include dropout voltage at 300mA (0.50–0.62V for 1.1V ≤ V_OUT < 1.5V), EN logic thresholds (V_IL ≤ 0.5V, V_IH ≥ 1.3V), thermal pad grounding guidance, and compatibility with 1.0µF ceramic input/output capacitors.

Technical Context

The AP7341-135FS4-7 employs a CMOS-based error amplifier architecture with integrated voltage reference and current-limit circuitry, enabling stable regulation across 1.7V–5.25V input range while maintaining tight load/line regulation (≤0.1%/V line, ≤30mV load). Its internal N-channel pass transistor delivers low R_DS(ON), supporting 300mA continuous output with dropout as low as 0.50V at 150mA for 1.35V output.

Enable functionality is implemented via a dedicated CMOS-compatible EN pin (Pin 3) that places the device in shutdown mode (<1.0µA standby current) when pulled low, and activates regulation when driven high. The thermal pad is electrically isolated but thermally coupled to GND, requiring PCB copper area connection for optimal thermal dissipation without serving as primary ground return path.

Key Specifications

Pinout & Package

The AP7341-135FS4-7 is housed in a 1.0mm × 1.0mm X2-DFN1010-4 package with wettable flank leads and an exposed thermal pad (non-electrical, for thermal conduction only).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO applications.

Compared with MCP1700-135TOE/MB and XC6219B135MR-G, the AP7341-135FS4-7 provides superior PSRR (75dB vs. ≤70dB) and lower noise (60µV_rms vs. ≥50µV_rms) in the smallest footprint (1.0×1.0mm) with wettable flanks for reliable reflow inspection-critical for high-reliability RF and imaging systems.

Availability

AP7341-135FS4-7 is available at Aetrix Electronics and suitable for RF power amplifier bias, mobile camera sensor core supply, wireless audio codec reference, and low-power BLE SoC I/O rail applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for AP7341-135FS4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-performance power management, signal integrity, and protection solutions for consumer, industrial, and communications markets.

The AP7341 series belongs to Diodes' high-PSRR, low-noise LDO product line, designed specifically for noise-sensitive applications in portable wireless devices-including smartphones, tablets, and wearables-where battery life, board space, and signal integrity are critical constraints.

FAQ

What is the recommended input and output capacitor configuration for AP7341-135FS4-7?

A minimum 0.47µF ceramic capacitor is required between VIN and GND; 1.0µF ceramic is recommended for both CIN and COUT. Place CIN within 2mm of PIN4 (VIN) and PIN2 (GND), and COUT adjacent to PIN1 (VOUT) and PIN2 (GND) to minimize loop inductance and ensure stability under transient loads up to 300mA.

How does the thermal pad on the X2-DFN1010-4 package function, and how should it be connected?

The thermal pad is electrically isolated but thermally conductive. It must be connected to a large copper pour tied to GND for heat dissipation-never used as the sole GND return path. Recommended layout uses ≥4 thermal vias (0.3mm diameter) connecting the pad to inner-layer GND planes to maintain junction temperature below 125°C at 300mA load.

Does AP7341-135FS4-7 include automatic output discharge during shutdown?

No-the AP7341-135FS4-7 is the non-discharge version (no "D" suffix). When EN is pulled low, VOUT remains floating and discharges only through the load. For active discharge, select AP7341D-135FS4-7, which integrates a 30Ω NMOS between VOUT and GND activated during shutdown.

What is the maximum allowable input voltage, and what happens if it exceeds the rating?

The absolute maximum input voltage is 6.0V. Exceeding this risks permanent damage due to gate oxide breakdown in the internal CMOS pass transistor. Operation above 5.25V violates recommended conditions and may cause output regulation failure, increased dropout, or accelerated parametric drift-even if below 6.0V.