Infineon Technologies AUIRS4428S

Overview

AUIRS4428S from Infineon Technologies (formerly International Rectifier) is an automotive-qualified dual low-side gate driver IC designed to control two N-channel power MOSFETs or IGBTs in synchronous or complementary switching topologies. It features matched 70 ns / 65 ns turn-on/turn-off propagation delays, ±2.3 A / +3.3 A peak output current capability, and 6–20 V gate drive supply range - deployed in hybrid powertrain DC-DC converters and direct fuel injection drivers.

For engineers reviewing the AUIRS4428S datasheet, AUIRS4428S pinout, AUIRS4428S application, or AUIRS4428S equivalent, key selection criteria include channel phase relationship (OUTA inverted, OUTB non-inverted), AEC-Q100 qualification status, SOIC-8 thermal resistance (200 °C/W), and latch-immune CMOS Schmitt-trigger inputs compatible with LSTTL logic levels.

Technical Context

The AUIRS4428S integrates two independent high-current buffer stages with matched internal propagation paths, enabling precise timing alignment between channels for push-pull and half-bridge configurations. Its input stage uses latch-immune CMOS Schmitt triggers with VIH = 2.7 V and VIL = 0.8 V, ensuring noise immunity in automotive environments.

Each output delivers asymmetric pulsed current: IO+ = 2.3 A (sink) and IO− = 3.3 A (source) under 15 V VS and 10 µs pulse width, supporting fast MOSFET gate charging/discharging. The device operates across −40 °C to +125 °C ambient, with junction temperature limited to 150 °C and MSL3 moisture sensitivity rating.

Key Specifications

Pinout & Package

Package: 8-Lead SOIC (SOIC-8N), RoHS-compliant, MSL3, lead-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual low-side gate driver applications.

Compared with TPIC2603D and LM5113SD, the AUIRS4428S offers native dual-channel phase control in a compact SOIC-8 with proven AEC-Q100 reliability - making it optimal for cost-sensitive, timing-critical automotive power stages where analog simplicity and layout efficiency are prioritized.

Availability

AUIRS4428S is available at Aetrix Electronics and suitable for hybrid powertrain DC-DC converters, direct fuel injection systems, and electric power steering auxiliary drivers requiring stable component supply across extended automotive product lifecycles.

Supply support for AUIRS4428S includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a global semiconductor leader specializing in power management, automotive electronics, and industrial control solutions, with core expertise in high-reliability silicon and SiC devices.

The AUIRS4428S belongs to Infineon's automotive-grade gate driver product line, engineered specifically for robust, low-latency MOSFET/IGBT control in engine management, transmission, and 48 V subsystems.

FAQ

What is the maximum allowable gate capacitance this driver can switch at 100 kHz?

The AUIRS4428S delivers 3.3 A sourcing and 2.3 A sinking current into capacitive loads. At 100 kHz with 50% duty cycle and 70 ns propagation delay, it reliably drives up to ~8.5 nF total gate charge (Q_g) assuming 15 V V_GS, based on t_r/t_f ≤ 35/50 ns and Q_g = I_pk × t_r. Larger capacitances require parallel drivers or gate resistors to limit dV/dt-induced ringing.

Can INA and INB be driven from the same PWM signal?

Yes - driving both inputs with the same PWM signal results in complementary outputs (OUTA inverted, OUTB non-inverted), enabling push-pull operation without external logic. However, inter-channel delay matching (≤5 ns skew) must be verified in-system, as board layout asymmetry may introduce additional skew beyond the specified 70 ns matched propagation.

Is there internal overtemperature protection?

No - the AUIRS4428S does not include thermal shutdown circuitry. Protection relies on external design: PCB copper area, ambient derating per R_thJA = 200 °C/W, and system-level monitoring of VS supply current (I_QBS = 120–200 µA quiescent). Junction temperature must be kept ≤150 °C via thermal design, as exceeding this risks permanent parametric shift.

How does the NC pin configuration affect PCB layout?

Pins 1 and 8 are no-connect terminals. Per IR application notes, they must either remain unconnected or be tied to GND - floating NC pins may act as antennas for EMI coupling. Grounding them improves noise immunity but requires careful routing to avoid introducing ground loops; recommended practice is to connect both to local GND pour with short traces and no vias.