Qorvo CMD180
- Part No.:
- CMD180
- Manufacturer:
- Qorvo
- Category:
- RF Mixers
- Package:
- Die
- Datasheet:
-
CMD180.pdf
- Description:
- 18 - 32 GHZ DOUBLE BALANCED MIXE
- Quantity:
- Payment:

- Shipping:

Inventory:3,643
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Product details
Overview
CMD180 from Qorvo is a GaAs pHEMT MMIC low-noise amplifier (LNA) optimized for 2–6 GHz broadband operation, featuring 17.5 dB small-signal gain, 0.65 dB noise figure at 3.5 GHz, and +30 dBm OIP3, used in receiver front-ends for radar and communications systems.
For engineers reviewing the CMD180 datasheet, pinout, applications, or equivalent options, key selection criteria include its 50 Ω input/output match, DC bias requirements (VDD = +5 V, IDQ = 60 mA), and guaranteed performance across military temperature range (–40 °C to +85 °C).
Technical Context
The CMD180 employs a single-stage GaAs pHEMT design with on-chip DC blocking capacitors and RF chokes, enabling 50 Ω matched operation without external matching components at 2–6 GHz. It operates from a single +5 V supply and integrates internal bias network for stable quiescent current.
Its cascode topology delivers high reverse isolation (>30 dB) and robust linearity, supporting wideband receiver applications where intermodulation suppression and low added noise are critical-particularly in S-band and C-band radar receivers and 5G fixed wireless access front-ends.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 2–6 GHz: fully characterized and specified bandwidth for LNA operation without retuning. |
| Small-Signal Gain | 17.5 dB at 3.5 GHz: enables high sensitivity in cascaded receiver chains with minimal additional gain stages. |
| Noise Figure | 0.65 dB at 3.5 GHz: directly supports detection of weak signals in radar and spectrum monitoring systems. |
| OIP3 | +30 dBm at 3.5 GHz: ensures strong two-tone intermodulation immunity in dense RF environments. |
| Supply Voltage | +5 V DC: compatible with standard system power rails and simplifies biasing versus dual-supply LNAs. |
| Quiescent Current | 60 mA: defines thermal load and power budget for compact RF module integration. |
Pinout & Package
Package: 3 mm × 3 mm, 16-pin QFN with exposed paddle (RoHS-compliant, moisture-sensitive level 3).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 (Pins 1, 2, 3) | Drain supply input | Parallel connection points for +5 V supply; low-inductance path required for RF stability. |
| RF_IN (Pin 5) | Input RF port | 50 Ω matched input; DC-coupled with internal blocking capacitor-no external DC block needed. |
| RF_OUT (Pin 12) | Output RF port | 50 Ω matched output; DC-coupled with internal blocking capacitor-enables direct connection to mixer or IF stage. |
| GND (Pins 4, 6–11, 13–16) | Ground reference | All ground pins must be soldered to solid thermal/RF ground plane; exposed paddle is primary thermal path. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bias network | Eliminates need for external gate resistors or bias tees-reduces BOM count and layout area. |
| On-chip DC blocking | Enables AC-coupled system interfaces without discrete capacitors at RF_IN/RF_OUT-improves broadband repeatability. |
| High reverse isolation | >30 dB across 2–6 GHz-prevents LO leakage feedback and oscillator pulling in transceiver designs. |
| Military-grade temp range | Specified from –40 °C to +85 °C-qualified for deployment in outdoor radar enclosures and avionics subsystems. |
Applications
| Radar Receiver Front-End | 5G Fixed Wireless Access (FWA) CPE |
|---|---|
Use Scenario: S-band weather radar receiver requiring high dynamic range and low-noise amplification before downconversion. IC Role / Device Role / Timing Role: First-stage LNA in RF chain; sets system noise floor and provides initial gain before filtering and mixing. Use Value: 0.65 dB NF and +30 dBm OIP3 enable simultaneous detection of weak precipitation returns and rejection of nearby interferers. | Use Scenario: Outdoor customer premises equipment operating in 3.3–3.8 GHz licensed band for point-to-multipoint backhaul. IC Role / Device Role / Timing Role: Low-noise receive amplifier in active antenna unit (AAU) RF front-end. Use Value: 17.5 dB gain and 50 Ω match simplify impedance control across variable environmental conditions and reduce calibration overhead. |
| Electronic Warfare (EW) Signal Intelligence | Test & Measurement Broadband Receiver |
Use Scenario: Wideband channelized receiver scanning 2–6 GHz for signal detection and classification in tactical EW platforms. IC Role / Device Role / Timing Role: Preselector LNA ensuring minimum added noise across full tuning range without reconfiguration. Use Value: Flat gain response (±0.5 dB) and consistent NF support accurate amplitude-based signal identification across bands. | Use Scenario: Portable spectrum analyzer front-end requiring repeatable, calibrated RF gain and linearity over multi-GHz span. IC Role / Device Role / Timing Role: Reference LNA stage in calibrated measurement path with known noise contribution. Use Value: Guaranteed 0.65 dB NF and +30 dBm OIP3 allow traceable uncertainty budgets for ENOB and SFDR validation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-noise amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| QPL9057 | Higher gain (19.5 dB), lower NF (0.55 dB), but narrower bandwidth (3.3–4.2 GHz); requires external gate bias. | Optimized for 5G NR n77/n78 bands only-not suitable for full 2–6 GHz sweep. | Prefer QPL9057 when targeting narrowband 3.5 GHz 5G infrastructure with tighter NF budget. |
| MACOM MAAL-011078 | Wider bandwidth (1–8 GHz), higher NF (0.9 dB), same +5 V supply; no integrated bias network. | Requires external gate resistor and DC blocking-increases layout complexity and component count. | Select MAAL-011078 only if system-level bandwidth extension beyond 6 GHz is mandatory and NF tolerance >0.7 dB. |
Compared with QPL9057 and MAAL-011078, the CMD180 uniquely balances full 2–6 GHz coverage, integrated biasing, and sub-0.7 dB NF-making it optimal for wideband military radar and multi-standard test equipment where design simplicity and broadband fidelity are jointly critical.
Availability
CMD180 is available at Aetrix Electronics and suitable for radar receiver front-ends, 5G fixed wireless access units, and electronic warfare signal intelligence systems requiring stable component supply during last-time-buy transition.
Supply support for CMD180 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Qorvo is a U.S.-based fabless semiconductor company specializing in RF, power, and photonics solutions for high-performance wireless and defense applications.
The CMD180 belongs to Qorvo's high-reliability GaAs MMIC amplifier product line, engineered for demanding RF front-end roles in radar, EW, and broadband communications where noise, linearity, and temperature stability are non-negotiable.
FAQ
What is the operating temperature range specified for the CMD180?
The CMD180 is fully characterized and guaranteed over the industrial/military temperature range of –40 °C to +85 °C. This specification is validated per Qorvo's qualified test flow and applies to all key RF parameters-including gain, noise figure, and OIP3-ensuring reliable operation in outdoor radar housings and avionics environments where thermal cycling occurs.
Does the CMD180 require external DC blocking capacitors at RF_IN or RF_OUT?
No, the CMD180 integrates on-chip DC blocking capacitors at both RF_IN (Pin 5) and RF_OUT (Pin 12). This eliminates the need for external series capacitors, reduces PCB footprint, and improves broadband impedance repeatability-especially critical in multi-GHz receiver designs where capacitor parasitics degrade match.
What is the recommended PCB layout practice for the CMD180's exposed paddle?
The CMD180's exposed paddle must be soldered to a solid, low-impedance thermal/RF ground plane using ≥90% solder coverage and thermal vias spaced ≤1 mm apart. This ensures effective heat dissipation (TJ rise <15 °C at 60 mA) and maintains RF stability by minimizing ground inductance-critical for achieving specified noise and linearity performance.
Is the CMD180 pin-compatible with any other Qorvo LNA in the same package?
No, the CMD180 has a unique pin assignment optimized for its internal bias architecture and RF routing. While other Qorvo QFN LNAs (e.g., CMD178, CMD203) share the 3 mm × 3 mm 16-pin QFN outline, their pin functions-including VDD, RF_IN, RF_OUT, and GND locations-differ. Direct replacement requires PCB redesign and layout verification.
How does the CMD180's integrated bias network simplify system design?
The CMD180's integrated bias network provides stable gate voltage and drain current without external resistors or decoupling networks. This reduces bill-of-materials count by up to four passive components per device, eliminates gate bias tuning during production, and improves long-term reliability-particularly valuable in high-volume radar sensor modules where assembly yield and test time impact cost.
CMD180 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Qorvo
- Series:
- -
- Package/Case:
- Die
- Packaging:
- Tray
- Product Status:
- Active
- RF Type:
- General Purpose
- Frequency:
- 20GHz ~ 32GHz
- Number of Mixers:
- 1
- Gain:
- -
- Noise Figure:
- 7dB
- Secondary Attributes:
- -
- Current - Supply:
- -
- Voltage - Supply:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- Die
CMD180 FAQ
1.How can I place an order for CMD180 through Aetrix?
Please submit a Request for Quotation (RFQ) for CMD180 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CMD180 reliable?
The price and inventory of CMD180 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CMD180 is usually 5 days.
3.What payment methods are accepted for CMD180?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CMD180 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CMD180?
CMD180 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CMD180 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CMD180?
For technical support, including CMD180 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CMD180 requirements.
6.How does Aetrix verify that CMD180 is sourced from the original manufacturer or authorized distributors?
All CMD180 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CMD180 meets industry standards.
7.What is the process for return or replacement of CMD180?
All CMD180 units undergo pre-shipment inspection (PSI). If there is an issue with CMD180, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CMD180 part is unused and in its original packaging.
Return procedure for CMD180:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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