Infineon Technologies CY7C63723C-SXCT

Overview

CY7C63723C-SXCT from Cypress Semiconductor is an 8-bit RISC one-time-programmable (OTP) microcontroller integrating low-speed USB 2.0 and PS/2 protocol support in a single die. It features an internal 6-MHz ±1.5% crystalless oscillator, integrated 3.3V USB pull-up regulator (VREG/P2.0), 8 KB EPROM, 256 bytes RAM, and up to 16 GPIO pins with 50 mA sink capability per pin - enabling direct drive of LEDs, switches, and RF receiver inputs in human interface devices.

For engineers reviewing the CY7C63723C-SXCT datasheet, CY7C63723C-SXCT pinout, CY7C63723C-SXCT application, or CY7C63723C-SXCT equivalent, key selection criteria include dual-mode auto-configuration (USB/PS/2 without external mode-switching components), capture timer support for wireless RF input decoding, and SOIC-18 packaging with verified 4.0–5.5 VDC operation and 0°C to 70°C industrial temperature range.

Technical Context

The CY7C63723C implements a Harvard-architecture RISC core running at 12 MHz CPU clock derived from internal 6-MHz oscillator or external 6-MHz ceramic resonator. Its USB Serial Interface Engine (SIE) supports one device address and three endpoints (control, interrupt, bulk), compliant with USB HID v1.1 and USB 2.0 low-speed specification (1.5 Mbps).

PS/2 mode operates using the same D+/SCLK and D–/SDATA pins with internal pull-ups and dedicated start-of-transaction interrupt; no GPIOs are consumed for mode management. Four 8-bit input capture registers (two per P0.0/P0.1) enable precise timing measurement of RF or encoder signals with programmable edge polarity and five prescaler options.

Key Specifications

Pinout & Package

CY7C63723C-SXCT is housed in an 18-pin SOIC package (body width 3.9 mm, lead pitch 1.27 mm), pin-compatible with CY7C63722C and CY7C63743C families but with reduced I/O count versus 24-pin variants.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-speed USB + PS/2 peripheral controller applications.

Compared with CY7C63743C-SXCT, CY7C63723C-SXCT trades I/O count for compact SOIC-18 footprint and lower unit cost; versus AN11861, it delivers true hardware PS/2 mode with zero GPIO overhead and guaranteed timing compliance - critical for certified HID peripherals.

Availability

CY7C63723C-SXCT is available at Aetrix Electronics and suitable for gaming peripherals, industrial HMI panels, wireless remote receivers, and kiosk terminals requiring stable component supply and long-term production continuity.

Supply support for CY7C63723C-SXCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) is a fabless semiconductor company specializing in mixed-signal ICs for USB, memory, PSoC, and automotive applications since 1982.

The enCoRe™ USB product line was designed specifically to reduce component count in low-speed HID peripherals by integrating USB/PS/2 protocol engines, crystalless oscillators, and high-drive GPIO - targeting mice, keyboards, and game controllers.

FAQ

Is CY7C63723C-SXCT still recommended for new designs?

No - Cypress explicitly marks CY7C63723C as "Not Recommended for New Designs" in its official datasheet (Rev. *D, October 2010). This reflects end-of-life planning; however, Aetrix Electronics maintains active inventory and provides full supply chain support for legacy production programs and repair spares through lifecycle coordination.

Does CY7C63723C-SXCT require an external crystal for USB operation?

No - the device uses an internal 6-MHz ±1.5% crystalless oscillator optimized for USB low-speed timing. An external 6-MHz ceramic resonator is optional and only needed if tighter frequency tolerance is required; XTALIN/P2.1 and XTALOUT pins remain unused in default configuration.

How does PS/2 mode detect and switch automatically?

PS/2 mode activates when the device detects valid PS/2 clock/data activity (SCLK/SDATA transitions matching PS/2 protocol timing) on D+/D– pins. No firmware polling or GPIO configuration is required - the hardware SIE autonomously reconfigures pin functions and enables internal PS/2 pull-ups and interrupt generation.

What is the maximum sink current per GPIO pin, and is it safe for LED driving?

Each GPIO pin (P0.x and P1.x) supports 50 mA continuous sink current. This allows direct connection of standard 20 mA LEDs with series resistors omitted - verified in Cypress application notes for CY7C637xxC. Total package current remains within SOIC-18 thermal limits when ≤8 pins operate simultaneously at full sink.