Infineon Technologies CY7C63723-SXC

Overview

CY7C63723-SXC from Cypress Semiconductor is an 8-bit RISC one-time-programmable (OTP) microcontroller integrating low-speed USB 2.0 and PS/2 interface logic, internal 6-MHz oscillator, 8 KB EPROM, 256-byte RAM, and 16 GPIO pins with 50 mA sink capability per pin. It operates from 4.0–5.5 V, supports auto-mode switching between USB and PS/2 without external components, and targets human-interface devices such as wired/wireless mice and gamepads.

For engineers reviewing the CY7C63723-SXC datasheet, CY7C63723-SXC pinout, CY7C63723-SXC application, or CY7C63723-SXC equivalent, key selection criteria include dual-mode interface autonomy, crystalless USB timing compliance, integrated 3.3V VREG for D– pull-up, GPIO interrupt masking per pin, and capture timer support for RF input edge detection in wireless peripherals.

Technical Context

The CY7C63723-SXC implements a Harvard-architecture RISC core running at 12 MHz CPU clock derived from either internal 6-MHz oscillator (±1.5% USB-tolerant) or external ceramic resonator. Its USB Serial Interface Engine (SIE) supports one device address and three endpoints (control + two data), with D+/D– pins multiplexed as PS/2 SCLK/SDATA and internal pull-ups enabling seamless mode transition.

It integrates four 8-bit input capture registers tied to P0.0 and P0.1, each configurable for rising/falling edge capture with five prescaler options; a 12-bit free-running timer provides 128 µs and 1.024 ms interrupt sources; and the internal 3.3V regulator (VREG/P2.0) supplies current for the mandatory 1.3-kΩ USB pull-up resistor on D–.

Key Specifications

Pinout & Package

Package: 18-pin Small Outline Integrated Circuit (SOIC), 0.300-inch body width, standard JEDEC MS-012AC footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-speed USB + PS/2 peripheral controller applications.

Compared with CY7C63743-SXC, the CY7C63723-SXC offers identical dual-mode logic and timing accuracy in a smaller 18-pin footprint but sacrifices 6 GPIOs and SPI; versus LPC11U12FHN33/102, it delivers deterministic PS/2 hardware support and lower firmware overhead at the cost of ARM ecosystem flexibility.

Availability

CY7C63723-SXC is available at Aetrix Electronics and suitable for wired human-interface devices, wireless peripheral dongles, industrial keypad terminals, and POS adapter modules requiring stable component supply and long-term obsolescence management.

Supply support for CY7C63723-SXC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) is a fabless semiconductor company specializing in programmable system-on-chip solutions for USB, memory, and mixed-signal applications.

The enCoRe™ USB product line was designed specifically to reduce component count in low-speed USB and PS/2 peripherals-emphasizing crystalless operation, integrated regulation, and hardware-mode auto-detection for cost-sensitive HIDs.

FAQ

Does CY7C63723-SXC require an external crystal for USB operation?

No. The device features an internal 6-MHz oscillator trimmed to ±1.5% accuracy, which satisfies USB low-speed timing requirements without any external crystal or resonator. An external 6-MHz ceramic resonator may be used for tighter tolerance, but it is optional-not required-for full USB compliance.

How does the CY7C63723-SXC switch between USB and PS/2 modes?

Mode switching is fully automatic and hardware-driven: the SIE detects bus activity on D+/D– lines and configures them as USB differential signals, or detects PS/2 clock/data transitions and reconfigures them as SCLK/SDATA. No firmware intervention or GPIO control is needed-no external components or mode-select pins are required.

What is the purpose of the VREG/P2.0 pin?

VREG/P2.0 provides a regulated 3.3V output that powers the mandatory 1.3-kΩ pull-up resistor on the D– line for USB enumeration. In PS/2 mode, the regulator is disabled and the pin functions as a general-purpose input (P2.0), allowing reuse without external switching circuitry.

Can the CY7C63723-SXC support wireless RF receiver interfaces?

Yes. P0.0 and P0.1 serve as dedicated inputs to four 8-bit capture timers, each configurable for rising or falling edge detection with five prescaler options. This enables precise measurement of RF packet preamble timing-commonly used in 2.4 GHz wireless mice and gamepads-to synchronize wake-up and reduce average power consumption.