Infineon Technologies CY7C63743-PXC

Overview

CY7C63743-PXC from Cypress Semiconductor is an 8-bit RISC OTP microcontroller integrating low-speed USB 2.0 and PS/2 interface logic, internal 6-MHz oscillator, 3.3V USB pull-up regulator (VREG/P2.0), 8 KB EPROM, 256-byte RAM, and 16 GPIO pins with 50 mA sink capability per pin. It operates from 4.0–5.5 V at 0–70°C and targets dual-mode human-interface devices.

For engineers reviewing the CY7C63743-PXC datasheet, CY7C63743-PXC pinout, CY7C63743-PXC application, or CY7C63743-PXC equivalent, key selection criteria include crystalless USB timing compliance, auto-configurable USB/PS/2 mode switching without GPIO overhead, integrated 3.3V VREG for D– pull-up, and capture timer support for RF wireless input decoding.

Technical Context

The CY7C63743-PXC implements a Harvard-architecture RISC core running at 12 MHz CPU clock derived from an internal 6-MHz oscillator tunable to ±1.5% for USB timing compliance. It embeds a full USB Serial Interface Engine (SIE) supporting one device address and three endpoints, plus native PS/2 protocol handling via shared D+/SCLK and D–/SDATA pins.

Its I/O subsystem includes two configurable ports (P0.0–P0.7, P1.0–P1.7), each pin supporting CMOS output, open-drain, high-Z input, or internal pull-up - with maskable edge-triggered interrupts and dedicated capture inputs on P0.0/P0.1. A 12-bit free-running timer and four 8-bit input capture registers enable precise event timing for wireless receiver interfaces.

Key Specifications

Pinout & Package

CY7C63743-PXC is packaged in 24-pin SOIC (small outline integrated circuit), with 0.300-inch body width and standard 1.27 mm pitch. Pin 1 is marked by a notch or dot; pin numbering follows counter-clockwise convention from top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-speed USB + PS/2 peripheral controller applications.

Compared with CY7C63723-PXI, CY7C63743-PXC offers six additional GPIO and QSOP/SOIC/PDIP flexibility; versus AN98512, it is the underlying silicon enabling that reference design - making CY7C63743-PXC the only production-orderable, pin-compatible solution for full-featured dual-mode peripherals.

Availability

CY7C63743-PXC is available at Aetrix Electronics and suitable for industrial human-interface devices, gaming peripherals, and embedded HID controllers requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for CY7C63743-PXC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) is a fabless semiconductor company specializing in programmable system-on-chip solutions, USB controllers, and mixed-signal ICs for embedded applications.

The enCoRe™ USB product line was designed specifically to reduce component count in low-speed USB peripherals - integrating oscillator, regulator, transceiver, and dual-mode logic into a single 8-bit RISC microcontroller for mice, keypads, and joysticks.

FAQ

Does CY7C63743-PXC require an external crystal for USB operation?

No. The device features an internal 6-MHz oscillator tunable to ±1.5% for USB low-speed timing compliance. An external 6-MHz ceramic resonator is optional for higher precision but not required. The internal oscillator eliminates crystal-related EMI and reduces BOM cost by one component.

How does automatic USB/PS/2 mode switching work without GPIO control?

Mode detection is handled entirely in hardware: USB traffic on D+/D– triggers USB mode; PS/2 clock/data activity on the same pins activates PS/2 mode. No firmware GPIO configuration or external logic is needed - the SIE and PS/2 state machine manage protocol selection autonomously.

What is the function of the VREG/P2.0 pin, and can it be used as a general-purpose input?

VREG/P2.0 delivers a regulated 3.3 V output for the USB D– pull-up resistor. When the regulator is disabled via firmware, the pin becomes a standard CMOS input (P2.0). This dual function allows shared pin usage while maintaining USB compliance during active enumeration.

Can CY7C63743-PXC support custom HID descriptors beyond standard mouse/keyboard profiles?

Yes. The 8 KB EPROM and flexible firmware architecture allow implementation of custom HID descriptors, including vendor-defined reports, multi-interface configurations, and non-standard usage pages - provided descriptor size fits within endpoint 0 buffer constraints and adheres to HID specification structure.