Infineon Technologies CY7C66113C-LTXC

Overview

CY7C66113C-LTXC from Cypress Semiconductor is a full-speed USB 1.1 peripheral microcontroller with integrated 4-port USB hub and programmable DAC port, serving as a compound device controller for keyboard/hub, HID composite peripherals, and embedded USB interface bridges. It features an 8-bit Harvard-architecture CPU (12 MHz internal clock), 8 KB PROM, 256-byte RAM, four downstream USB ports with individual GPIO power/overcurrent control, and 31 GPIO pins including eight DAC-sink outputs.

For engineers reviewing the CY7C66113C-LTXC datasheet, CY7C66113C-LTXC pinout, CY7C66113C-LTXC application, or CY7C66113C-LTXC equivalent, key selection criteria include its integrated hub + MCU architecture, DAC current-programmable I/O (3.2–16 mA for DAC[1:0]), 48-pin QFN/SSOP package options, and support for up to five USB endpoints with dual-device-address capability.

Technical Context

This device implements a dual-function architecture: a USB Serial Interface Engine (SIE) handles protocol-level USB 1.1 communication (12 Mbps), while an on-chip 4-port hub repeater manages upstream/downstream traffic routing and per-port power switching via dedicated GPIOs. The microcontroller core operates at 12 MHz derived from a 6 MHz external crystal via internal PLL, generating separate 48 MHz hub clock and 1 MHz timer base.

It integrates three configurable I/O subsystems: four GPIO ports (P0–P3) supporting CMOS/open-drain/pull-up modes with maskable edge-triggered interrupts; an I²C-compatible master interface (100 kHz) enabled through GPIO; and a dedicated DAC port (P4[7:0]) with per-pin sink-current programming (16 levels) and independent interrupt polarity control - exclusive to CY7C66113C.

Key Specifications

Pinout & Package

CY7C66113C-LTXC is available in a 56-pin QFN (7 mm × 7 mm, 0.5 mm pitch) package with exposed thermal pad. Pin assignments are fully defined in Cypress Document 38-08024 Rev. *D, including dedicated USB differential pairs, GPIO ports, DAC outputs, and hub control signals.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar USB peripheral + hub applications.

Compared with CY7C66113B-LTXC, the -LTXC variant offers field-programmable firmware for iterative HID development; versus USB2514B-AEZG, it trades USB 2.0 bandwidth for integrated MCU logic, DAC-based analog control, and reduced component count in resource-constrained embedded USB designs.

Availability

CY7C66113C-LTXC is available at Aetrix Electronics and suitable for keyboard-hub composites, industrial USB I/O modules, gaming peripheral hubs, and medical diagnostic dongles requiring stable component supply, long-term manufacturability, and qualified USB 1.1 compliance.

Supply support for CY7C66113C-LTXC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) designs mixed-signal ICs for USB, programmable systems, and human interface applications, with headquarters in San Jose, CA.

CY7C66113C belongs to Cypress's EZ-USB® FX1™ family - engineered specifically for cost-sensitive, full-speed USB peripheral applications requiring integrated microcontroller logic and hub functionality in a single package.

FAQ

What is the function of the DAC[1:0] pins on CY7C66113C-LTXC?

DAC[1:0] are two dedicated current-sink outputs supporting programmable sink currents from 3.2 mA to 16 mA (typical), optimized for driving LEDs with precise brightness control. Each pin's current is set independently via Isink registers, and writing '0' enables sink mode while '1' disables it and activates the internal 14 kΩ pull-up. These pins are not general-purpose I/O and lack input or open-drain functionality.

Does CY7C66113C-LTXC support USB 2.0 High-Speed mode?

No. CY7C66113C-LTXC is strictly a USB 1.1 Full-Speed device operating at 12 Mbps. It does not implement the USB 2.0 High-Speed (480 Mbps) PHY or protocol layers. Its integrated hub and SIE are designed exclusively for USB 1.1 compliance, including support for HID class descriptors and compound device enumeration.

How is the 48 MHz hub clock generated?

The 48 MHz hub clock is generated internally by a PLL locked to a 6 MHz external crystal connected to XTALIN/XTALOUT. This architecture avoids high-frequency crystal harmonics, reducing EMI. The same PLL also produces the 12 MHz CPU clock and 1 MHz timer base - all derived from the single 6 MHz reference without external clock synthesis components.

Can CY7C66113C-LTXC operate from a 3.3 V supply?

No. CY7C66113C-LTXC requires a 4.0 V to 5.5 V DC supply on VCC. Its USB transceivers and I/O buffers are designed for 5 V-tolerant operation, and VREF must be supplied with a regulated 3.3 V reference for proper USB signal levels - but the core logic and I/O drivers are not 3.3 V compatible. Operating below 4.0 V may cause reset instability or USB disconnects.