Vishay Siliconix DG183AP/883
- Part No.:
- DG183AP/883
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
DG183AP/883.pdf
- Description:
- IC SWITCH DPST-NOX2 10OHM 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,004
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Product details
Overview
DG183AP/883 from Vishay Siliconix is a radiation-hardened, dual DPST (double-pole, single-throw) JFET analog switch optimized for precision audio/video signal routing in aerospace and military systems. It features 10 Ω typical on-resistance (rDS(on)), <2 nA channel-on leakage (ID(on)), ±15 V dual supply operation, break-before-make switching, and operates across –55 °C to +125 °C. Used in high-fidelity video routing where flat on-resistance minimizes harmonic distortion.
For engineers reviewing the DG183AP/883 datasheet, DG183AP/883 pinout, DG183AP/883 application, or DG183AP/883 equivalent, key selection criteria include guaranteed rDS(on) ≤25 Ω over full analog range (–7.5 V to +15 V), <100 nA off-state leakage at hot temperature, 240 ns max turn-on time, 140 ns max turn-off time, and compatibility with TTL-level logic inputs (VINH ≥2.0 V, VINL ≤0.8 V).
Technical Context
The DG183AP/883 integrates four matched n-channel JFETs with a bipolar TTL-compatible driver stage, enabling bidirectional analog conduction with symmetric on-resistance and low charge injection. Its break-before-make architecture prevents momentary shorting between channels during state transitions.
It requires three independent supply rails: V+ (+15 V), V– (–15 V), and VL (+5 V) for logic, plus VR (ground reference); analog signal range spans –7.5 V to +15 V, supported by 36 V absolute maximum ratings between V+ and V–. Off-isolation exceeds 55 dB at 1 MHz into 75 Ω load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| rDS(on) | ≤25 Ω max (guaranteed over full analog range –7.5 V to +15 V); ensures minimal gain error and THD degradation in precision video/audio paths. |
| ID(on) | <2 nA max at room temperature; maintains DC accuracy in sample-and-hold and high-impedance sensor interfaces. |
| ton / toff | 400 ns / 220 ns max; supports >2 MHz switching rates in real-time video multiplexing without visible artifacts. |
| OIRR | >55 dB at 1 MHz (75 Ω load); provides strong channel-to-channel isolation for multi-source video routing. |
| Analog Range | –7.5 V to +15 V; accommodates standard ±7.5 V video signals and unipolar 0–15 V data acquisition ranges. |
| Supply Voltages | V+ = +15 V, V– = –15 V, VL = +5 V, VR = GND; enables robust operation in mixed-signal avionics environments. |
| Temp Range | –55 °C to +125 °C (MIL-PRF-38535 Class B, Level S); qualified for space-grade and tactical platform deployment. |
Pinout & Package
16-pin sidebraze ceramic package (hermetically sealed, MIL-STD-1835 compliant), suitable for high-reliability PCB mounting via welding or soldering. Thermal derating: 12 mW/°C above +75 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 16 | S1, S2 (Source 1/2) | Analog source terminals for first and second DPST switch; bidirectional, low-leakage current paths. |
| 2, 15 | D1, D2 (Drain 1/2) | Analog drain terminals; paired with S1/S2 to form two independent SPST switches per pole. |
| 3, 14 | V–, V+ | Negative and positive analog supply rails; support ±15 V operation and define analog signal swing limits. |
| 4, 13 | S3, S4 | Second set of source terminals; completes dual DPST topology (two poles × two throws). |
| 5, 12 | D3, D4 | Second set of drain terminals; enables independent control of two isolated analog paths. |
| 6, 11 | VL, VR | Logic supply (5 V) and reference ground; decouple digital control from analog signal integrity. |
| 7, 10 | IN1, IN2 | TTL-compatible digital inputs; activate respective DPST switches when driven ≥2.0 V (high) or ≤0.8 V (low). |
| 8, 9 | NC, NC | No-connect pins; electrically isolated and must remain unconnected per design specification. |
Key Features
| Feature | Design Value |
|---|---|
| Constant rDS(on) | Flat on-resistance across full analog voltage range eliminates gain nonlinearity in video amplifiers and ADC front-ends. |
| Break-before-make | Guaranteed no overlap between switch states prevents transient shorting in redundant power or signal path designs. |
| Radiation hardness | Qualified to MIL-PRF-38535 Level S; withstands total ionizing dose ≥100 krad(Si) for satellite and missile guidance systems. |
| Low crosstalk | <–60 dB feedthrough at 10 MHz; preserves signal fidelity in dense multi-channel video matrix applications. |
| Low distortion | Eliminates large-signal errors via symmetrical JFET structure and matched channel characteristics. |
Applications
| Video Routing in Avionics Displays | Precision Sample-and-Hold Circuits |
|---|---|
|
Use Scenario: Switching between multiple camera feeds (EO/IR, radar overlay) to a single display processor in fighter jet HUD systems. IC Role / Device Role / Timing Role: Dual DPST analog switch providing isolated, low-distortion signal path selection with sub-250 ns switching latency. Use Value: Maintains pixel-perfect synchronization and color fidelity across sources due to matched rDS(on) and <–60 dB crosstalk at 10 MHz. |
Use Scenario: Holding analog sensor outputs (gyro, accelerometer) during successive approximation ADC conversion cycles in inertial navigation units. IC Role / Device Role / Timing Role: Low-leakage analog switch isolating hold capacitor from input source during acquisition phase. Use Value: ID(on) <2 nA ensures <1 LSB error over 10 µs hold time for 16-bit resolution systems operating at –55 °C to +125 °C. |
| Aerospace Telemetry Multiplexing | Military Audio Signal Conditioning |
|
Use Scenario: Time-division multiplexing of 12 analog telemetry channels (voltage, temperature, pressure) onto a shared serial downlink in launch vehicle stages. IC Role / Device Role / Timing Role: Precision analog switch enabling sequential sampling with minimal channel-to-channel gain mismatch. Use Value: rDS(on) variation <5 Ω across temperature ensures consistent scaling across all 12 channels without per-channel calibration. |
Use Scenario: Selecting between encrypted comms audio, intercom, and external radio inputs in secure airborne communication systems. IC Role / Device Role / Timing Role: High-fidelity analog switch preserving wideband audio spectrum (20 Hz–20 kHz) without added noise or distortion. Use Value: Low THD and flat on-resistance maintain voice intelligibility and encryption waveform integrity under vibration and thermal stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual DPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DG184AP/883 | rDS(on) = 30 Ω max (vs. 25 Ω for DG183AP/883); higher leakage (100 nA hot vs. 30 nA); same pinout and temp range. | Better suited for lower-precision video or wider analog range (–12.5 V to +10 V) where on-resistance flatness is less critical. | Select DG184AP/883 only if system tolerates higher on-resistance drift or requires extended negative signal swing. |
| JM38510/11103BEA | Identical electrical specs and mechanical form; identical MIL-PRF-38535 Level S qualification; same 16-pin sidebraze package. | No functional difference; JEDEC-standardized military part number used interchangeably in DoD BOMs. | JM38510/11103BEA is a direct form-fit-function equivalent; use when procurement mandates JAN/USML-compliant part numbering. |
Compared with DG183AP/883, DG184AP/883 trades lower on-resistance for wider analog range and relaxed leakage, while JM38510/11103BEA offers identical performance under a standardized military part number-enabling compliance-driven sourcing without design change.
Availability
DG183AP/883 is available at Aetrix Electronics and suitable for aerospace telemetry multiplexing, avionics video routing, and military precision sample-and-hold circuits requiring stable component supply across extended temperature and radiation environments.
Supply support for DG183AP/883 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix designs high-reliability discrete semiconductors and analog ICs, specializing in power management, signal conditioning, and precision switching solutions for demanding industrial and defense markets.
The DG183AP/883 belongs to the DG183/184/185 family of radiation-hardened JFET analog switches, engineered specifically for high-fidelity signal routing in MIL-STD-810 and MIL-STD-461-compliant aerospace and tactical platforms.
FAQ
What is the guaranteed maximum on-resistance for DG183AP/883 across its full operating temperature range?
The DG183AP/883 guarantees rDS(on) ≤25 Ω over the full –55 °C to +125 °C range when tested at IS = –10 mA and VD = –7.5 V. This value is specified in the "Full" temperature column of the datasheet's rDS(on) parameter table and reflects worst-case production testing limits-not typical or room-temperature-only values. The DG183AP/883 achieves this consistency via matched JFET geometry and process-controlled threshold voltages.
Does DG183AP/883 support bidirectional analog signal flow, and what is the maximum peak-to-peak voltage it can block in the off state?
Yes, DG183AP/883 supports fully bidirectional analog conduction in the on state, with symmetric rDS(on) and leakage behavior. In the off state, it blocks up to 20 V peak-to-peak analog signals, verified by feedthrough measurements of <–60 dB at 10 MHz. This blocking capability is enabled by the JFET's inherent reverse-biased gate-channel junction and is validated across the full –55 °C to +125 °C range for DG183AP/883.
What logic voltage levels are required to reliably drive the IN1 and IN2 inputs of DG183AP/883?
DG183AP/883 requires VINH ≥2.0 V (minimum) and VINL ≤0.8 V (maximum) for guaranteed TTL-compatible switching. These thresholds are specified under full temperature range conditions and ensure robust noise margin in electrically noisy avionics environments. The DG183AP/883 draws only <0.01 µA input current at VIN = 5 V, minimizing loading on upstream logic drivers.
How is radiation hardness implemented in DG183AP/883, and what qualification level does it meet?
DG183AP/883 is fabricated using a radiation-hardened silicon process and qualified to MIL-PRF-38535 Class B, Level S-meeting requirements for spaceflight and nuclear-hardened systems. It is tested for total ionizing dose (TID) tolerance ≥100 krad(Si) and exhibits no parametric shift beyond limits after exposure. This qualification is intrinsic to the DG183AP/883 die and package construction, not an external add-on.
Can DG183AP/883 operate with asymmetric supply rails, such as V+ = +12 V and V– = –5 V?
No-DG183AP/883 requires symmetric ±15 V supplies (V+ = +15 V, V– = –15 V) for guaranteed specification compliance. While absolute maximum ratings allow V+ to V– up to 36 V, the analog signal range (–7.5 V to +15 V), rDS(on), and leakage parameters are characterized and warranted only at the nominal ±15 V condition. Deviating from this risks violating guaranteed performance, especially at temperature extremes. The DG183AP/883 datasheet explicitly defines test conditions using ±15 V.
DG183AP/883 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Circuit:
- DPST - NO
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 10Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- -
- Voltage - Supply, Dual (V±):
- ±15V
- Switch Time (Ton, Toff) (Max):
- 400ns, 200ns
- -3db Bandwidth:
- -
- Charge Injection:
- -
- Channel Capacitance (CS(off), CD(off)):
- 21pF, 17pF
- Current - Leakage (IS(off)) (Max):
- 10nA
- Crosstalk:
- -
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-DIP
DG183AP/883 FAQ
1.How can I place an order for DG183AP/883 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG183AP/883 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG183AP/883 reliable?
The price and inventory of DG183AP/883 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG183AP/883 is usually 5 days.
3.What payment methods are accepted for DG183AP/883?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG183AP/883 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG183AP/883?
DG183AP/883 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG183AP/883 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG183AP/883?
For technical support, including DG183AP/883 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG183AP/883 requirements.
6.How does Aetrix verify that DG183AP/883 is sourced from the original manufacturer or authorized distributors?
All DG183AP/883 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG183AP/883 meets industry standards.
7.What is the process for return or replacement of DG183AP/883?
All DG183AP/883 units undergo pre-shipment inspection (PSI). If there is an issue with DG183AP/883, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG183AP/883 part is unused and in its original packaging.
Return procedure for DG183AP/883:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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