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Vishay Siliconix DG2005DQ-T1-E3
- Part No.:
- DG2005DQ-T1-E3
- Manufacturer:
- Vishay Siliconix
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
DG2005DQ-T1-E3.pdf
- Description:
- IC SW SPST-NO/NCX2 2.5OHM 10MSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,294
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Product details
Overview
DG2005DQ-T1-E3 from Vishay Siliconix is a dual SPST analog switch optimized for low-voltage, high-accuracy signal routing in portable systems. It operates from 1.8 V to 5.5 V, delivers 1.2 Ω typical on-resistance at 5 V, achieves 13 ns turn-on time, and injects only 1 pC charge - enabling precision sample-and-hold and battery-powered communication interfaces.
For engineers reviewing the DG2005DQ-T1-E3 datasheet, DG2005DQ-T1-E3 pinout, DG2005DQ-T1-E3 application, or DG2005DQ-T1-E3 equivalent, key selection criteria include guaranteed rON flatness (≤0.2 Ω), sub-100 pA off-leakage at 85°C, MSOP-8 thermal performance (320 mW @ 25°C), and TTL/CMOS-compatible logic thresholds across full supply range.
Technical Context
The DG2005DQ-T1-E3 implements two independent, bidirectional SPST switches fabricated on Vishay's low-voltage JI2 CMOS process with epitaxial latchup protection. Each switch supports rail-to-rail analog signal swing (0 V to V+) and exhibits symmetrical conduction when ON.
Control logic uses non-inverting inputs: IN1 and IN2 directly enable NO1 and NO2 paths respectively, while NC1 and NC2 remain unconnected per the DG2005 variant. The device requires no external biasing and draws ≤1 µA quiescent current at 25°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range | 1.8 V to 5.5 V - enables direct interface with 1.8 V, 3.3 V, and 5 V logic and analog domains without level shifting |
| rON (Typ, 5 V) | 1.2 Ω - minimizes signal attenuation and gain error in precision instrumentation and audio paths |
| tON/tOFF (Typ, 5 V) | 13 ns / 19 ns - supports >20 MHz switching rates in multiplexed data acquisition systems |
| QINJ | 1 pC - ensures <1 LSB error in 12-bit+ SAR ADC sample-and-hold front-ends |
| ICOM(off) (Max, 85°C) | 8 nA - maintains signal integrity in high-impedance sensor interfaces and battery-monitoring circuits |
| OIRR / XTALK | –61 dB / –67 dB @ 1 MHz - provides robust channel separation in RF test equipment and multi-channel comms ICs |
| Package | MSOP-8 - 3 mm × 3 mm footprint with 0.65 mm pitch, suitable for space-constrained handheld PCBs |
Pinout & Package
MSOP-8 package with exposed thermal pad (not electrically connected); 0.65 mm lead pitch; body dimensions 3.0 mm × 3.0 mm × 1.1 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NO1) | Normally Open Switch Terminal 1 | Signal path connects to COM1 only when IN1 = HIGH; bidirectional analog node |
| 2 (V+) | Positive Supply Rail | Accepts 1.8–5.5 V; powers internal logic and switch FETs; decoupling required within 5 mm |
| 3 (COM1) | Common Terminal 1 | Center node of first SPST switch; routes analog signals between NO1 and NC1 (NC1 not bonded in DG2005) |
| 4 (IN1) | Digital Control Input 1 | Non-inverting logic input; drives NO1–COM1 path ON when ≥2.4 V (at V+ = 5 V) |
| 5 (IN2) | Digital Control Input 2 | Non-inverting logic input; drives NO2–COM2 path ON when ≥2.4 V (at V+ = 5 V) |
| 6 (COM2) | Common Terminal 2 | Center node of second SPST switch; routes analog signals between NO2 and NC2 (NC2 not bonded in DG2005) |
| 7 (GND) | Ground Reference | Analog and digital return; must be low-impedance plane; ties substrate and ESD protection network |
| 8 (NO2) | Normally Open Switch Terminal 2 | Signal path connects to COM2 only when IN2 = HIGH; independent of NO1/COM1 path |
Key Features
| Feature | Design Value |
|---|---|
| Low rON flatness | ≤0.2 Ω over full analog range (0 V to V+) at 5 V - preserves linearity in audio and sensor signal chains |
| Bidirectional signal flow | Identical rON and leakage in both directions - eliminates polarity constraints in AC-coupled or differential paths |
| Latchup immunity | Epitaxial isolation structure - meets JEDEC JESD78 Class II requirements without external protection |
| Ultra-low charge injection | 1 pC maximum - prevents voltage glitches that corrupt high-resolution ADC sampling |
| TTL/CMOS logic compatibility | VINH = 2.4 V min / VINL = 0.8 V max at V+ = 5 V - interoperates with standard microcontroller GPIOs |
Applications
| Portable Test Equipment | Cellular Phone Front-End |
|---|---|
Use Scenario: Signal routing between multiple sensors and a shared ADC in handheld multimeters or oscilloscope probes. IC Role / Device Role / Timing Role: Dual SPST analog switch selecting analog inputs while maintaining low distortion and minimal offset drift. Use Value: 1.2 Ω rON and 1 pC QINJ ensure measurement accuracy remains within ±0.1% for 12-bit conversions across temperature. |
Use Scenario: Antenna diversity switching and RF front-end calibration path selection in 4G/LTE handsets. IC Role / Device Role / Timing Role: Low-capacitance analog switch isolating RF signal paths during transmit/receive mode transitions. Use Value: –67 dB crosstalk and 51 pF off-capacitance minimize coupling between LTE bands and preserve TRP/TIS performance. |
| Battery-Operated Medical Sensors | Sample-and-Hold Circuits |
Use Scenario: Multiplexing ECG, SpO₂, and temperature signals into a low-power MCU ADC in wearable health monitors. IC Role / Device Role / Timing Role: Ultra-low leakage analog switch enabling >10 GΩ effective input impedance for biopotential amplification. Use Value: 8 nA max ICOM(off) at 85°C prevents baseline drift and preserves signal-to-noise ratio in millivolt-level bio-signal acquisition. |
Use Scenario: Sampling phase control in precision data acquisition systems using SAR or sigma-delta ADCs. IC Role / Device Role / Timing Role: Charge-injection-optimized switch capturing analog input voltage with minimal hold-mode error. Use Value: 1 pC QINJ limits aperture uncertainty to <0.025 LSB in 16-bit systems operating at 1 MSPS. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4617EUA+ | Higher rON (3.5 Ω typ @ 5 V); 20 ns tON; SO-8 package (larger footprint) | Lower bandwidth suitability; less optimal for >10 MSPS sampling | Prefer DG2005DQ-T1-E3 when board space and charge injection are critical |
| ADG708BRUZ | Octal SPST; 3.5 Ω rON; 16-lead TSSOP; higher supply current (1 µA vs. 0.02 µA) | Higher channel count but larger size and power - unsuitable for ultra-portable designs | Choose DG2005DQ-T1-E3 for dual-channel, low-power, space-constrained implementations |
Compared with MAX4617EUA+ and ADG708BRUZ, the DG2005DQ-T1-E3 offers the lowest rON, smallest MSOP-8 footprint, and lowest charge injection - making it optimal for high-accuracy, battery-sensitive dual-path routing where thermal dissipation and layout area are constrained.
Availability
DG2005DQ-T1-E3 is available at Aetrix Electronics and suitable for portable test equipment, cellular phone front-end modules, and battery-operated medical sensors requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for DG2005DQ-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability, high-performance analog solutions for demanding industrial and consumer applications.
The DG2003/2004/2005 family was designed specifically for low-voltage, low-distortion analog signal routing in space- and power-constrained portable electronics - emphasizing rail-to-rail operation, minimal charge injection, and latchup immunity.
FAQ
What is the maximum analog signal voltage supported by the DG2005DQ-T1-E3?
The DG2005DQ-T1-E3 supports analog signals from 0 V to V+, where V+ ranges from 1.8 V to 5.5 V. For example, with V+ = 5.5 V, the full analog range is 0 V to 5.5 V. Exceeding V+ on any terminal triggers internal clamping diodes, so input signals must stay within this rail-to-rail window to avoid forward-biasing protection structures and violating absolute maximum ratings.
Does the DG2005DQ-T1-E3 have NC (normally closed) terminals connected internally?
No. The DG2005DQ-T1-E3 is configured as a dual NO (normally open) switch: pins 1 (NO1) and 8 (NO2) are functional, while pins 3 (NC1) and 6 (NC2) are not bonded and serve as no-connect terminals. This differs from the DG2003 (dual NO) and DG2004 (dual NC) variants - confirming DG2005DQ-T1-E3 provides only NO–COM switching paths.
What is the thermal performance of the DG2005DQ-T1-E3 in MSOP-8 package?
The DG2005DQ-T1-E3 in MSOP-8 has a maximum power dissipation of 320 mW at 25°C ambient, derating linearly at 6.5 mW/°C above that temperature. Its junction-to-ambient thermal resistance (θJA) is approximately 312°C/W, meaning sustained 100 mW operation raises junction temperature by ~31°C above ambient - well within the –40°C to +85°C operating range when properly mounted on a 2-layer PCB with thermal relief.
How does the DG2005DQ-T1-E3 handle logic-level compatibility across different supply voltages?
The DG2005DQ-T1-E3 guarantees TTL/CMOS-compatible logic thresholds across its entire 1.8 V–5.5 V supply range: VINH is ≥1.6 V (min) at V+ = 2.0 V and ≥2.4 V (min) at V+ = 5.0 V; VINL is ≤0.4 V (max) at V+ = 2.0 V and ≤0.8 V (max) at V+ = 5.0 V. This allows direct interfacing with mixed-voltage microcontrollers without external level shifters.
Is the DG2005DQ-T1-E3 suitable for use in high-frequency RF signal paths?
The DG2005DQ-T1-E3 is not optimized for RF switching above 100 MHz. While its –67 dB crosstalk and 51 pF off-capacitance support IF and baseband routing up to ~50 MHz, insertion loss rises significantly above 10 MHz due to rON and parasitic capacitance. For GHz-range antenna switching, dedicated RF SOIs or GaAs switches are recommended instead of the DG2005DQ-T1-E3.
DG2005DQ-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPST - NO/NC
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 2.5Ohm
- Channel-to-Channel Matching (ΔRon):
- -
- Voltage - Supply, Single (V+):
- 1.8V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 28ns, 22ns
- -3db Bandwidth:
- -
- Charge Injection:
- 1pC
- Channel Capacitance (CS(off), CD(off)):
- 51pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -67dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
DG2005DQ-T1-E3 FAQ
1.How can I place an order for DG2005DQ-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG2005DQ-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG2005DQ-T1-E3 reliable?
The price and inventory of DG2005DQ-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG2005DQ-T1-E3 is usually 5 days.
3.What payment methods are accepted for DG2005DQ-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG2005DQ-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG2005DQ-T1-E3?
DG2005DQ-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG2005DQ-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG2005DQ-T1-E3?
For technical support, including DG2005DQ-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG2005DQ-T1-E3 requirements.
6.How does Aetrix verify that DG2005DQ-T1-E3 is sourced from the original manufacturer or authorized distributors?
All DG2005DQ-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG2005DQ-T1-E3 meets industry standards.
7.What is the process for return or replacement of DG2005DQ-T1-E3?
All DG2005DQ-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with DG2005DQ-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG2005DQ-T1-E3 part is unused and in its original packaging.
Return procedure for DG2005DQ-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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