Vishay Siliconix DG2017DN-T1-E4
- Part No.:
- DG2017DN-T1-E4
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-VQFN Exposed Pad
- Datasheet:
-
DG2017DN-T1-E4.pdf
- Description:
- IC SWITCH DPDT X 2 3.7OHM 16QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG2017DN-T1-E4 from Vishay Siliconix is a dual DPDT (double-pole/double-throw) analog switch optimized for portable audio systems, featuring two independent switch pairs: SW1/SW2 with 3.2 Ω on-resistance at 2.7 V for stereo line-level routing, and SW3/SW4 with 0.64 Ω on-resistance at 2.7 V for low-impedance speaker switching. It operates from 2 V to 5.5 V, delivers tON as fast as 46 ns (SW3/SW4), and supports ±200 mA continuous current per switch path.
For engineers reviewing the DG2017DN-T1-E4 datasheet, DG2017DN-T1-E4 pinout, DG2017DN-T1-E4 application, or DG2017DN-T1-E4 equivalent, key selection considerations include on-resistance matching between switch pairs, break-before-make timing (≤45 ns), charge injection (≤2 pC), off-isolation (–68 dB at 1 MHz), and QFN-16 package thermal performance under battery-operated load conditions.
Technical Context
The DG2017DN-T1-E4 integrates four independently controlled SPDT switches in DPDT topology-two high-current (SW3/SW4) and two precision signal (SW1/SW2)-with separate on-resistance optimization per pair. Its CMOS architecture includes epitaxial latchup protection and rail-to-rail analog signal handling up to V+.
Switch control uses standard TTL/CMOS logic levels (VINH = 1.6 V min, VINL = 0.4 V max) with guaranteed break-before-make timing and bidirectional conduction. All switches block up to V+ when off and conduct equally well in both directions when on, enabling flexible single-ended or differential BTL audio routing without polarity constraints.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2 V to 5.5 V - enables direct integration with Li-ion battery rails (2.7–4.2 V) and 3.3 V logic without level shifters. |
| RON (SW1/SW2) | 3.2 Ω at 2.7 V - ensures minimal insertion loss (<0.1 dB) in line-level audio paths with 10 kΩ source/load impedances. |
| RON (SW3/SW4) | 0.64 Ω at 2.7 V - supports ≥1 W speaker drive into 4 Ω loads with <50 mV voltage drop at 200 mA DC current. |
| tON / tOFF | 46 ns / 21 ns (SW3/SW4) - allows clean switching of audio signals up to 10 MHz without audible artifacts or transient pop. |
| Charge Injection | 2 pC (SW1/SW2), 1 pC (SW3/SW4) - limits output voltage glitch to <2 mV on 1 nF load, critical for microphone bias stability. |
| Off-Isolation | –68 dB (SW1/SW2), –51 dB (SW3/SW4) at 1 MHz - suppresses crosstalk between speaker and mic paths in shared PCB traces. |
| Continuous Current | ±200 mA per NO/NC/COM terminal - sustains full-power mono speaker output or dual-mic biasing without derating at 25 °C. |
Pinout & Package
Package: QFN-16 (4 mm × 4 mm, 0.65 mm pitch), thermally enhanced with exposed copper pad (pin 1 marked).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 12, 11, 10 | NC1–NC4, NO1–NO4 | Normally closed / normally open terminals for four SPDT switch sections - NC/NO pairing defines throw direction per pole. |
| 4, 5, 6, 8, 9, 13, 14, 15, 16 | COM1–COM4, IN1–IN4, V+, GND | Common analog paths (COM), digital control inputs (IN), power (V+), and ground - COM pins carry full analog signal current; IN pins accept 0.4 V/1.6 V logic thresholds. |
| 7 | Exposed Thermal Pad | Internally connected to GND - must be soldered to PCB ground plane for thermal dissipation (derate 23.5 mW/°C above 70 °C). |
Key Features
| Feature | Design Value |
|---|---|
| Dual RON-optimized DPDT structure | SW1/SW2 (3.2 Ω) for line-level integrity; SW3/SW4 (0.64 Ω) for speaker drive - eliminates need for discrete switch combinations in audio subsystems. |
| Guaranteed break-before-make | ≤45 ns maximum td - prevents momentary short-circuit between speaker and mic paths during mode switching in headset detection. |
| Low charge injection (1–2 pC) | Minimizes DC offset step on microphone bias networks, avoiding audible "pop" during plug-in/out or jack detection events. |
| Rail-to-rail analog signal range | Supports full V+ swing on all COM/NC/NO pins - enables seamless integration with differential BTL amplifier outputs and single-ended mic preamps. |
| Latchup-immune CMOS process | Epitaxial layer prevents destructive latchup under ESD or overvoltage transients - meets IEC 61000-4-2 Level 3 (±8 kV contact). |
Applications
| Smartphone Audio Routing | Headset Jack Detection |
|---|---|
Use Scenario: Dynamic reconfiguration of audio paths during 3.5 mm TRRS jack insertion/removal in smartphones. IC Role / Device Role / Timing Role: DG2017DN-T1-E4 acts as a dual-path analog multiplexer, isolating mic and speaker lines while enabling simultaneous detection and routing. Use Value: Enables zero-pop switching between internal speaker and external headset using SW3/SW4's 0.64 Ω RON and SW1/SW2's 2 pC charge injection. |
Use Scenario: Detecting presence and configuration (CTIA vs OMTP) of wired headsets via resistance measurement across tip/ring/sleeve contacts. IC Role / Device Role / Timing Role: DG2017DN-T1-E4 routes bias voltage and sense lines to specific jack contacts under MCU control, leveraging its four independent SPDT sections. Use Value: Full isolation (–68 dB off-isolation) prevents measurement crosstalk; low RON ensures accurate <1% resistance reading accuracy down to 10 Ω. |
| Portable Media Player Output Switching | Dual-Microphone Differential Input |
Use Scenario: Selecting between stereo line-out, mono speaker-out, and headphone-out in battery-powered media players. IC Role / Device Role / Timing Role: DG2017DN-T1-E4 provides DPDT switching for left/right channel routing and BTL speaker drive enablement in a single package. Use Value: Space savings versus discrete SPDT solutions; matched RON (≤0.3 Ω ΔRON) preserves channel balance across 20 Hz–20 kHz audio band. |
Use Scenario: Configuring two electret microphones in either single-ended or differential input topology for noise cancellation. IC Role / Device Role / Timing Role: DG2017DN-T1-E4 switches mic bias and signal paths to support both configurations without external components. Use Value: SW3/SW4's 0.64 Ω RON minimizes bias droop on 2.2 kΩ mic loads; 1 pC charge injection prevents DC shift in differential preamp inputs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual DPDT analog switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Texas Instruments TS5A3157DRCR | Single-channel SPDT (not DPDT); 0.75 Ω RON at 3 V; no dedicated low-RON speaker pair; QFN-10 package. | Lacks integrated dual-path stereo/mic separation; requires two devices for DPDT function; higher board area and routing complexity. | Select only if system needs only one SPDT section and space allows dual placement; not drop-in for DG2017DN-T1-E4's DPDT topology. |
| Analog Devices ADG884BRMZ | Dual SPDT (not DPDT); 0.5 Ω RON at 3 V; no RON differentiation between channels; MSOP-10 package; no guaranteed break-before-make. | Cannot replicate DG2017DN-T1-E4's asymmetric RON optimization or integrated BTL/mic switching; lacks off-isolation spec (–68 dB). | Use where matched low RON across all paths is prioritized over functional partitioning; verify timing behavior in actual layout due to unspecified break-before-make. |
Compared with TS5A3157DRCR and ADG884BRMZ, the DG2017DN-T1-E4 uniquely integrates dual RON-optimized DPDT functionality in one QFN-16 package, enabling true single-chip stereo/mic path separation with guaranteed timing and isolation - reducing BOM count and PCB area by ≥40% in portable audio designs.
Availability
DG2017DN-T1-E4 is available at Aetrix Electronics and suitable for smartphone audio routing, headset jack detection, and portable media player output switching requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for production ramp.
Supply support for DG2017DN-T1-E4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability MOSFETs, diodes, optoelectronics, and analog switches engineered for efficiency, miniaturization, and ruggedness.
The DG2017DN-T1-E4 belongs to Vishay's low-voltage analog switch product line, designed specifically for space-constrained, battery-powered portable audio systems requiring ultra-low on-resistance, precise timing control, and robust ESD tolerance.
FAQ
What is the maximum continuous current rating per switch path in DG2017DN-T1-E4?
The DG2017DN-T1-E4 supports ±200 mA continuous current through any NO, NC, or COM terminal across the full operating temperature range (–40 °C to +85 °C). This rating applies individually to each of the four switch sections (SW1–SW4) and is validated under thermal derating conditions (23.5 mW/°C above 70 °C). The DG2017DN-T1-E4 maintains this current capability without RON degradation or latchup risk due to its epitaxial CMOS process.
Does DG2017DN-T1-E4 support rail-to-rail analog signal switching?
Yes, the DG2017DN-T1-E4 supports rail-to-rail analog signal switching: signals on COM, NC, and NO pins can swing from GND to V+ (up to 5.5 V) without distortion or clipping. This is confirmed in the Absolute Maximum Ratings table (VNO/VNC/VCOM = –0.3 V to V+ + 0.3 V) and functional operation specifications. The DG2017DN-T1-E4 achieves this while maintaining low RON flatness (<2 Ω variation across 0–V+ range for SW1/SW2 at 2.7 V).
What is the guaranteed break-before-make time for DG2017DN-T1-E4?
The DG2017DN-T1-E4 guarantees break-before-make timing of ≤45 ns for SW1/SW2 and ≤26 ns for SW3/SW4 across the full temperature range (–40 °C to +85 °C), as specified in the Dynamic Characteristics table. This timing is ensured by internal circuit design (not production-tested) and prevents signal shorting during state transitions - critical for safe switching between speaker and microphone paths in headset detection circuits using the DG2017DN-T1-E4.
How does the on-resistance differ between the two switch pairs in DG2017DN-T1-E4?
The DG2017DN-T1-E4 features asymmetric on-resistance optimization: SW1 and SW2 (line-level pair) specify 3.2 Ω typical RON at 2.7 V, while SW3 and SW4 (speaker pair) specify 0.64 Ω typical RON at 2.7 V. This difference is intentional - SW3/SW4 use wider channel geometry to handle higher current, whereas SW1/SW2 prioritize signal integrity for low-current audio paths. Both pairs maintain tight RON matching (ΔRON ≤ 0.3 Ω) within their respective groups, as verified in the DC Characteristics table.
Is DG2017DN-T1-E4 compatible with 1.8 V logic control inputs?
No, the DG2017DN-T1-E4 is not guaranteed compatible with 1.8 V logic inputs. Its input threshold specifications require VINH ≥ 1.6 V and VINL ≤ 0.4 V at V+ = 2–5.5 V, meaning reliable switching requires ≥2 V supply and corresponding logic-high ≥1.6 V. Driving IN1–IN4 from a 1.8 V GPIO may result in marginal or undefined switching behavior; a level shifter or 2.7 V+ logic interface is recommended for robust operation with the DG2017DN-T1-E4.
DG2017DN-T1-E4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- DPDT
- Multiplexer/Demultiplexer Circuit:
- 2:2
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 3.7Ohm
- Channel-to-Channel Matching (ΔRon):
- 300mOhm (Max)
- Voltage - Supply, Single (V+):
- 2V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 85ns, 35ns
- -3db Bandwidth:
- -
- Charge Injection:
- 2pC
- Channel Capacitance (CS(off), CD(off)):
- 43pF
- Current - Leakage (IS(off)) (Max):
- 500pA
- Crosstalk:
- -69dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (4x4)
DG2017DN-T1-E4 FAQ
1.How can I place an order for DG2017DN-T1-E4 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG2017DN-T1-E4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG2017DN-T1-E4 reliable?
The price and inventory of DG2017DN-T1-E4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG2017DN-T1-E4 is usually 5 days.
3.What payment methods are accepted for DG2017DN-T1-E4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG2017DN-T1-E4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG2017DN-T1-E4?
DG2017DN-T1-E4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG2017DN-T1-E4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG2017DN-T1-E4?
For technical support, including DG2017DN-T1-E4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG2017DN-T1-E4 requirements.
6.How does Aetrix verify that DG2017DN-T1-E4 is sourced from the original manufacturer or authorized distributors?
All DG2017DN-T1-E4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG2017DN-T1-E4 meets industry standards.
7.What is the process for return or replacement of DG2017DN-T1-E4?
All DG2017DN-T1-E4 units undergo pre-shipment inspection (PSI). If there is an issue with DG2017DN-T1-E4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG2017DN-T1-E4 part is unused and in its original packaging.
Return procedure for DG2017DN-T1-E4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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