Vishay Siliconix DG3157ADN-T1-E4
- Part No.:
- DG3157ADN-T1-E4
- Manufacturer:
- Vishay Siliconix
- Package:
- 6-UFDFN
- Datasheet:
-
DG3157ADN-T1-E4.pdf
- Description:
- IC SWITCH SPDTX1 15OHM 6MINIQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DG3157ADN-T1-E4 from Vishay Siliconix is a low-voltage, single-pole double-throw (SPDT) analog switch with 300 MHz -3 dB bandwidth, 1.8 V to 5.5 V supply range, and internal pull-down on control pin S. It supports bidirectional analog/digital signal routing up to VCC, features break-before-make switching, and is housed in a 1 mm × 1.2 mm miniQFN-6 package for space-constrained portable electronics.
For engineers reviewing the DG3157ADN-T1-E4 datasheet, DG3157ADN-T1-E4 pinout, DG3157ADN-T1-E4 application, or DG3157ADN-T1-E4 equivalent, key selection criteria include on-resistance flatness (<13 Ω at 3.0 V), charge injection (5 pC at 3.3 V), off-isolation (-57 dB at 10 MHz), and power-down safe operation with >8 kV HBM ESD rating.
Technical Context
The DG3157ADN-T1-E4 uses sub-micron CMOS technology to achieve low on-resistance (as low as 4.8 Ω typ. at 4.5 V) and minimal propagation delay (0.3 ns typ. at 5 V). Its logic input threshold is specified at 1.2 V (V+ = 3.3 V), enabling compatibility with 1.8 V and 3.3 V logic families without level shifting.
Break-before-make timing is guaranteed across voltage range (0.5–3 ns max), and power-down protection ensures high-impedance isolation when V+ is absent. The internal pull-down resistor on pin S eliminates floating-control risk during power sequencing - a distinguishing feature versus DG3157B.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - supports direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V systems without external regulators. |
| On-Resistance (RON) | 4.8 Ω typ. at V+ = 4.5 V - enables <1% signal attenuation in 50 Ω RF paths and low insertion loss in audio/data lines. |
| -3 dB Bandwidth | 300 MHz - suitable for USB 1.1, LVDS, and high-speed digital I/O switching up to ~150 Mbps. |
| Charge Injection | 5 pC at V+ = 3.3 V - minimizes glitch-induced error in precision ADC/DAC multiplexing and sample-hold circuits. |
| Off-Isolation (OIRR) | -57 dB at 10 MHz - suppresses crosstalk between B0/B1 channels in multi-source sensor or audio routing applications. |
| ESD Rating (HBM) | >8 kV - meets IEC 61000-4-2 Level 4 for robust handling in automated assembly and field-deployed equipment. |
| Power-Down Safe | Yes - maintains high-impedance state on all terminals when V+ = 0 V, preventing back-powering or latch-up in powered-down subsystems. |
Pinout & Package
Package: miniQFN-6 (1.20 mm × 1.00 mm × 0.55 mm height), RoHS-compliant, exposed thermal pad (pin 6 = GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (S) | Logic Control Input | Active-high select; internal 100 kΩ pull-down ensures default B0-to-A connection during power-up or floating states. |
| 2 (GND) | Ground Reference | Primary return path for switch current and logic reference; connected to exposed thermal pad for thermal dissipation. |
| 3 (A) | Common Output Terminal | Single bidirectional port connecting to load; supports rail-to-rail analog signals up to V+. |
| 4 (V+) | Positive Supply Rail | Provides bias for internal CMOS switches and level-shifting circuitry; clamps S/A/B pins to V+ + 0.3 V max. |
| 5 (B1) | Input/Output Channel 1 | Second SPDT path; connects to A when S = high; high-impedance when unselected. |
| 6 (B0) | Input/Output Channel 0 | Default SPDT path; connects to A when S = low; high-impedance when unselected. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-small footprint | 1.0 mm × 1.2 mm miniQFN-6 - saves >60% board area vs. MSOP-8, ideal for wearables and ultra-thin modules. |
| Power-down protection | Guaranteed high-Z on all pins at V+ = 0 V - prevents back-driving of powered ICs and avoids system-level fault propagation. |
| Low logic threshold | VTH(HIGH) = 1.2 V at V+ = 3.3 V - ensures reliable switching with 1.8 V GPIOs without external level translators. |
| Zero-bounce flow-through mode | No contact bounce during static S-state - eliminates transient glitches in audio routing and sensor multiplexing. |
| Break-before-make timing | 0.5–3 ns guaranteed - prevents momentary shorting between B0 and B1, critical for hot-swap and mixed-voltage domain isolation. |
Applications
| Portable Audio Multiplexer | USB 1.1 Data Line Switch |
|---|---|
|
Use Scenario: Routing microphone, headset, and line-in signals in smartphones and Bluetooth earbuds. IC Role / Device Role / Timing Role: Bidirectional SPDT analog switch selecting between multiple audio sources to a single codec input. Use Value: 300 MHz bandwidth preserves full audio spectrum fidelity; 5 pC charge injection prevents pop/click artifacts during source switching. |
Use Scenario: Isolating or sharing USB D+/D− lines between host controller and peripheral ports in docking stations. IC Role / Device Role / Timing Role: High-speed data path selector enabling dynamic USB port reconfiguration without connector hot-plug. Use Value: -57 dB off-isolation at 10 MHz suppresses cross-talk between active/inactive USB lanes; 0.3 ns propagation delay maintains signal integrity at 12 Mbps. |
| Industrial Sensor Hub | Medical Patient Monitor Signal Routing |
|
Use Scenario: Multiplexing outputs from temperature, pressure, and accelerometer sensors into a shared ADC channel. IC Role / Device Role / Timing Role: Low-leakage analog switch providing channel selection with minimal offset drift and THD < 0.016 %. Use Value: On-resistance flatness <13 Ω ensures consistent gain scaling across channels; >300 mA latch-up immunity withstands industrial ESD events. |
Use Scenario: Selecting between ECG, SpO₂, and NIBP front-end signal paths in compact bedside monitors. IC Role / Device Role / Timing Role: Medical-grade analog switch with power-down safe behavior to isolate disconnected patient leads during standby. Use Value: Internal S-pin pull-down prevents undefined state during power cycling; >8 kV HBM ESD protects against clinical environment discharge events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Texas Instruments TS5A23157DBVR | No internal pull-down on control pin; RON = 6.5 Ω typ. at 3.3 V; same miniQFN-6 footprint. | Lacks power-down safe default state - requires external pull-down resistor for deterministic startup behavior. | Choose when external control logic guarantees defined S-pin state; verify PCB layout accommodates added resistor. |
| Analog Devices ADG849YRMZ-REEL7 | Higher supply range (1.8–5.5 V); RON = 0.5 Ω typ. at 5 V; 10-lead MSOP package (larger footprint). | Better performance in low-RON precision applications but incompatible pinout and larger board area requirement. | Prefer for ultra-low on-resistance needs where board space allows MSOP-10; not drop-in compatible with DG3157ADN-T1-E4 layout. |
Compared with TS5A23157DBVR and ADG849YRMZ-REEL7, the DG3157ADN-T1-E4 uniquely combines internal S-pin pull-down, 1 mm × 1.2 mm footprint, and guaranteed break-before-make timing - making it optimal for space-constrained, power-sequenced systems requiring zero-risk startup behavior.
Availability
DG3157ADN-T1-E4 is available at Aetrix Electronics and suitable for portable audio multiplexing, USB 1.1 data routing, and industrial sensor hub applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DG3157ADN-T1-E4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability, high-performance solutions for automotive, industrial, and computing markets.
The DG3157A series targets ultra-compact, low-voltage signal routing in battery-powered and space-constrained systems - emphasizing power-down safety, minimal charge injection, and seamless 1.8 V/3.3 V logic compatibility.
FAQ
What is the function of the internal pull-down resistor in DG3157ADN-T1-E4?
The internal pull-down resistor on pin S of the DG3157ADN-T1-E4 ensures the control input defaults to logic low during power-up, reset, or floating conditions - guaranteeing B0-to-A connection until actively asserted. This eliminates need for external pull-down components and prevents undefined switching states in power-sequenced systems. DG3157ADN-T1-E4 relies on this feature for deterministic startup behavior.
Does DG3157ADN-T1-E4 support bidirectional signal routing?
Yes, DG3157ADN-T1-E4 supports fully bidirectional analog and digital signal routing between A, B0, and B1 terminals - signals up to V+ amplitude can pass in either direction with matched on-resistance characteristics. This enables flexible use in multiplexer, demultiplexer, and bus-switch configurations without polarity constraints. DG3157ADN-T1-E4 maintains symmetric RON and capacitance profiles across all paths.
What is the maximum operating frequency supported by DG3157ADN-T1-E4?
DG3157ADN-T1-E4 has a -3 dB bandwidth of 300 MHz, verified under RL = 50 Ω test conditions. This supports reliable switching of signals up to ~150 Mbps (NRZ) or analog waveforms with fundamental frequencies ≤150 MHz while maintaining <3 dB insertion loss. DG3157ADN-T1-E4 achieves this with 19 pF A-port capacitance and <7 pC charge injection.
How does DG3157ADN-T1-E4 behave when V+ is disconnected?
When V+ is disconnected or at 0 V, DG3157ADN-T1-E4 enters power-down safe mode: all terminals (A, B0, B1, S) present high-impedance states with leakage <±1 µA, preventing back-powering of upstream circuits or latch-up. This behavior is guaranteed per design and validated per JESD78 (>300 mA latch-up immunity). DG3157ADN-T1-E4 maintains isolation even during partial power loss scenarios.
Is DG3157ADN-T1-E4 RoHS-compliant and lead-free?
Yes, DG3157ADN-T1-E4 is RoHS-compliant and lead-free, as confirmed in the ordering information table and package documentation. The "-E4" suffix denotes Pb-free termination with NiPdAu plating, and the miniQFN-6 package meets exemption requirements per EU Directive 2011/65/EU. DG3157ADN-T1-E4 is marked with RoHS-compliant date code and shipped with full material declarations.
DG3157ADN-T1-E4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 1
- On-State Resistance (Max):
- 15Ohm
- Channel-to-Channel Matching (ΔRon):
- 800mOhm
- Voltage - Supply, Single (V+):
- 1.65V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 25ns, 21ns
- -3db Bandwidth:
- 300MHz
- Charge Injection:
- 7pC
- Channel Capacitance (CS(off), CD(off)):
- 7pF
- Current - Leakage (IS(off)) (Max):
- 1µA
- Crosstalk:
- -64dB @ 10MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-miniQFN (1x1.2)
DG3157ADN-T1-E4 FAQ
1.How can I place an order for DG3157ADN-T1-E4 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG3157ADN-T1-E4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG3157ADN-T1-E4 reliable?
The price and inventory of DG3157ADN-T1-E4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG3157ADN-T1-E4 is usually 5 days.
3.What payment methods are accepted for DG3157ADN-T1-E4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG3157ADN-T1-E4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG3157ADN-T1-E4?
DG3157ADN-T1-E4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG3157ADN-T1-E4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG3157ADN-T1-E4?
For technical support, including DG3157ADN-T1-E4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG3157ADN-T1-E4 requirements.
6.How does Aetrix verify that DG3157ADN-T1-E4 is sourced from the original manufacturer or authorized distributors?
All DG3157ADN-T1-E4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG3157ADN-T1-E4 meets industry standards.
7.What is the process for return or replacement of DG3157ADN-T1-E4?
All DG3157ADN-T1-E4 units undergo pre-shipment inspection (PSI). If there is an issue with DG3157ADN-T1-E4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG3157ADN-T1-E4 part is unused and in its original packaging.
Return procedure for DG3157ADN-T1-E4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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