Vishay Siliconix DG403DJ

Overview

DG403DJ from Vishay Siliconix is a dual SPDT CMOS analog switch optimized for precision signal routing in ±15 V analog systems, featuring 30 Ω typical on-resistance, 75 ns turn-on time, and break-before-make switching action - deployed in stereo source selectors and dual-slope integrators.

For engineers reviewing the DG403DJ datasheet, DG403DJ pinout, DG403DJ application, or DG403DJ equivalent, key selection criteria include guaranteed break-before-make timing (35 ns min), ±15 V analog signal range, low 40 pA channel on-leakage, and compatibility with TTL/CMOS logic at 5 V VL supply.

Technical Context

The DG403DJ implements two independent SPDT switches per package with complementary control logic: logic high enables SW1/SW2 while disabling SW3/SW4, and vice versa. Its break-before-make architecture is guaranteed via internal timing delay (t_D = 35 ns min) to prevent signal shorting during transition.

Constructed using Vishay's high-voltage silicon-gate process, it supports 44 V max V+–V− differential supply and maintains flat R_DS(on) across the full ±15 V analog range. An epitaxial layer ensures latch-up immunity, and bidirectional conduction supports symmetrical AC/DC signal routing.

Key Specifications

Pinout & Package

DG403DJ is housed in a 16-pin plastic DIP (JEDEC MS-012) package measuring 10.0 mm × 4.0 mm × 6.2 mm, with 2.54 mm lead pitch and through-hole mounting.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual SPDT analog switch applications.

Compared with MAX4673EPP+, DG403DJ offers guaranteed break-before-make timing essential for integrator safety, while ADG403BRZ provides identical switching performance with minor supply pin reconfiguration - making DG403DJ optimal for cost-sensitive, ±15 V industrial designs requiring proven shorting protection.

Availability

DG403DJ is available at Aetrix Electronics and suitable for audio routing, precision measurement, battery-powered instrumentation, and industrial control systems requiring stable component supply across long production lifecycles.

Supply support for DG403DJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global semiconductor manufacturer specializing in discrete MOSFETs, diodes, optoelectronics, and precision analog switches, with emphasis on high-reliability industrial and military-grade components.

The DG403DJ belongs to the DG40x family of low-power, high-speed CMOS analog switches designed specifically for precision signal routing in battery-operated and wide-dynamic-range test equipment.

FAQ

What is the guaranteed break-before-make timing specification for DG403DJ?

The DG403DJ guarantees a minimum break-before-make delay (t_D) of 35 ns under standard test conditions (R_L = 300 Ω, C_L = 35 pF). This parameter is production-tested and ensures no overlap between switch closure events in complementary SPDT pairs - a critical requirement in dual-slope integrator and peak detector topologies where shorting would cause functional failure. The DG403DJ datasheet specifies this value explicitly in the Dynamic Characteristics table.

Can DG403DJ operate with a single 30 V supply instead of dual ±15 V rails?

Yes, DG403DJ supports single-supply operation with V+ = 30 V and V− = 0 V, as confirmed by its Absolute Maximum Rating of 44 V between V+ and V− and functional specification down to V− = 0 V. However, the analog signal range reduces to 0 V to 30 V (not ±15 V), and R_DS(on) increases slightly versus dual-rail operation. The DG403DJ truth table and switching characteristics remain valid, and VL may still be supplied at 5 V for logic interface.

What is the maximum continuous current rating per switch terminal of DG403DJ?

The DG403DJ has a maximum continuous current rating of 30 mA per terminal, as specified in the Absolute Maximum Ratings table. This applies to both source (S) and drain (D) pins under steady-state conditions. Exceeding this limit risks thermal overstress or parametric shift. For pulsed operation (1 ms, 10% duty cycle), the rating increases to 100 mA - useful in burst-mode sampling applications where average power remains within safe limits.

Does DG403DJ require external pull-up or pull-down resistors on its digital control inputs?

No, DG403DJ does not require external biasing on IN1 or IN2. Its digital inputs are TTL/CMOS compatible with defined thresholds: logic low ≤ 0.8 V and logic high ≥ 2.4 V at VL = 5 V. Input leakage is ±1 µA max across temperature, so direct connection to microcontroller GPIO or FPGA outputs is fully supported. External resistors are unnecessary unless level-shifting from non-5 V logic families is required.

How does DG403DJ's charge injection performance affect precision sample-and-hold circuits?

DG403DJ specifies 60 pC typical charge injection (Q), measured with C_L = 10 nF and zero-source impedance. In a 10 nF hold capacitor, this induces a worst-case step error of 6 mV - acceptable for 12-bit systems but limiting for 14+ bit accuracy. To mitigate, designers use guard rings, matched switch layouts, or post-switch buffering. The DG403DJ datasheet confirms this value in the Dynamic Characteristics table and recommends minimizing source impedance to reduce error sensitivity.